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Per review: the AMD Extra timeout, NIXL/UCX autoselection, MiniMax mock retarget, and MLX comment are unrelated to GLM-5.3-Flash and are split into their own PR.
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The topology check from sgl-project#40340 rejects moe_ep_size=4 with tp_size=1. Same change as sgl-project#41002. Co-authored-by: xinguozhu-2026 <xinguo.zhu@intel.com>
AITER no longer ships aiter.ops.flydsl.utils or aiter.ops.flydsl.kernels.vector, so the MI35X KDA decode test failed at import. Use the MLIR vector dialect already imported as mlir_vector and drop the removed availability helper. Co-authored-by: long10024070 <long10024070@users.noreply.github.com>
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sgl-project#36559 made AiterRunnerCore read config.is_gated, so the test's SimpleNamespace config raised AttributeError.
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Motivation
Split the CI/test-hygiene fixes out of #39273 so the Flash PR stays focused on GLM-5.3 Flash enablement.
Modifications
tp_sizein the hash top-k EP override, which main's topology check rejects without itaiter.ops.flydsl.utilsandaiter.ops.flydsl.kernels.vector(co-authored with @long10024070)The MiniMax and hash top-k changes are identical to #41002, so either PR can merge first without conflicts.
Accuracy Tests
Not applicable; no model-output path changes.
Speed Tests and Profiling
Not applicable; no inference-speed path changes.
Checklist
CI States
Latest PR Test (Base): ❌ Run #36758661833
Latest PR Test (Extra): ❌ Run #36758661019
Latest PR Test (AMD ROCm 10): ❌ Run #36758661457