[NPU] Avoid FP8 dispatch for INT8 MoE on A5

[McZyWu]

Motivation

W8A8 MoE inference with DeepEP fails on Ascend A5 with x=DT_FLOAT8_E4M3FN, weight=DT_INT8 in aclnnGroupedMatmulWeightNz. Both an explicit --deepep-dispatcher-output-dtype int8 and auto resolved from the W8A8 quantization config map to use_fp8=True. DeepEP resolves this flag to INT8 on A3, but to per-token FP8 on A5. The flag also takes precedence over the normal-mode DEEP_NORMAL_MODE_USE_INT8_QUANT=1 fallback.

Modifications

Disable use_fp8 only for INT8 dispatcher requests on NPU arch35. Normal dispatch can then use its existing INT8 environment fallback; otherwise BF16 activations are dispatched and the existing MoE quantizer converts them to INT8 before grouped matmul. Low-latency dispatch uses the same BF16 fallback. A3 and explicit FP8/MXFP8/MXFP4 requests retain their existing behavior.

The change is limited to 9 added lines in one file.

Accuracy Tests

• Passed a local source-method harness with mocked device detection and tensor/kernel boundaries: 20 before/after routing cases covering A3/A5, auto/INT8/BF16/FP8 and A5 MXFP8/MXFP4, and normal-mode INT8 environment values 0/1. Both normal and low-latency routing are checked. The harness reproduces FP8 selection for the failing A5 INT8 requests before this change.
• Passed two mocked W8A8 input-path checks: BF16 input is dynamically quantized to INT8, while already-INT8 input with a scale reaches grouped matmul without requantization.
• Passed repository Ruff rules (F401,F821,UP037), Ruff format check, and git diff --check.
• A5 hardware execution and the GSM8K test_npu_deepep_dispatcher_output_dtype.py regression have not been run. The local harness does not validate numerical accuracy or NPU kernels.

Speed Tests and Profiling

Not run. The A5 BF16 fallback increases dispatch payload size relative to INT8 and adds local dynamic quantization. Normal dispatch with DEEP_NORMAL_MODE_USE_INT8_QUANT=1 retains INT8 dispatch. This is a minimal compatibility fix; it does not add an explicit A5 low-latency INT8 dispatch API.

Checklist

• Code formatting and repository Ruff rules checked.
• Local routing and W8A8 input-path checks passed with mocked hardware.
• A5 hardware accuracy and speed validation.

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CI States

Latest PR Test (Base): ❌ Run #36688522900
Latest PR Test (Extra): ❌ Run #36688522313
Latest PR Test (AMD ROCm 10): ❌ Run #36688522915

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