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[AMD] Register unified KV page-zeroing test in PR CI - #40123

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HaiShaw merged 2 commits into
sgl-project:mainfrom
michaelzhang-ai:amd/register-unified-handout-zeroing
Sep 22, 2026
Merged

HaiShaw merged 2 commits into
sgl-project:mainfrom
michaelzhang-ai:amd/register-unified-handout-zeroing

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@michaelzhang-ai

@michaelzhang-ai michaelzhang-ai commented Sep 18, 2026 •

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What

Register test_unified_handout_zeroing.py in stage-b-test-1-gpu-small-amd.

The test exercises the unified allocator and page-zeroing kernels on device memory. On AMD this lowers through ROCm Triton, covering backend-specific code generation and launch behavior while checking that fresh and recycled page envelopes are zeroed.

The AMD small suite grows from 108 to 109 effective entries (+9 estimated GPU-seconds).

Test plan

  • Registration lint and CI AST collector with sanity_check=True
  • ROCm 10 AMD CI: both tests in test_unified_handout_zeroing.py passed; partition 3 finished 7/7 (job)
  • ROCm 7.2.4 and 7.2.0 have not run
  • NVIDIA Base CI did not complete; the current run was canceled (run)

The overall AMD run also has an unrelated MI35x failure in test_quark_mxfp4.py: GSM8K accuracy was 0.826, below the required 0.85 (job).


CI States

Latest PR Test (Base): 🚫 Run #35676915009
Latest PR Test (Extra): ❌ Run #35676914878
Latest PR Test (AMD ROCm 10): ⏳ Run #35676914989

Register the unified handout zeroing unit test in the AMD 1-GPU suite. This exercises the ROCm Triton allocator and page-zeroing path with a 9-second estimate.
@michaelzhang-ai michaelzhang-ai added the run-ci CI: run the baseline test suite on this PR label Sep 18, 2026
@HaiShaw
HaiShaw merged commit 3f00fb7 into sgl-project:main Sep 22, 2026
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2 participants