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dsv4.1: vision tower and image preprocessing - #39668

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hnyls2002 merged 70 commits into
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dsv4.1-vision
Sep 17, 2026
Merged

hnyls2002 merged 70 commits into
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dsv4.1-vision

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@hnyls2002

@hnyls2002 hnyls2002 commented Sep 15, 2026 •

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Summary

  • Vision input for DeepSeek-V4.1: image preprocessing, the vision tower with its aligner, and the multimodal processor that turns request images into model inputs. Nothing here is reached unless a config with model_type = "deepseek_v41" and vision_n_layers > 0 is loaded.
  • multimodal/deepseek_v41_image_processing.py: grid planning (plan_image_grid, llm_grid), resize/pad/normalise and patchify on PIL, through the Rust extension (patchify_image_rust, from dsv4.1: Rust extension modules for image preprocessing, KV pool names, and PD bootstrap #39677) or on the GPU (prepare_image_gpu / materialize_image_gpu), and the per-image token-type layout (image_token_types).
  • models/deepseek_v41_vit.py: ViT (patch embedding, 2D rotary, transformer blocks on the shared VisionAttention, RMSNorm on its native path with an fp32 weight) and Aligner (3x3 downsample to the LLM width).
  • multimodal/processors/deepseek_v41.py: DeepseekV41ImageProcessor, which keeps the raw token ids the model's n-gram hashing needs and therefore runs its own preprocessing instead of the shared worker-pool chain (declared in test_processor_async_call_sites.py). The backend (PIL / Rust / GPU) follows the existing image-processor settings.
  • configs/model_config.py: has_dsv41_vision marks such configs multimodal and image-understanding; utils/hf_transformers/processor.py returns the plain tokenizer for them, since the processor above does the image work.

Changes to existing behavior

  • None for existing models: the two shared-file hunks are gated on model_type == "deepseek_v41", and the processor registers for DeepseekV4ForCausalLM only through the processor registry, which text-only V4 configs never consult (is_multimodal stays false).

Verification

  • Tower and preprocessing match the reference implementation step by step (normalisation, grid planning, token layout, rotary layout, aligner).
  • Replacing the local RMSNorm with the shared one on its native path leaves the tower output bit-identical for several patch grids.
  • test_processor_async_call_sites.py, test_hf_transformers.py, test_hf_transformers_loading.py and test_model_config_scaling.py cover the touched shared modules.

CI States

Latest PR Test (Base): 🚫 Run #35168832639
Latest PR Test (Extra): ❌ Run #35168832441
Latest PR Test (AMD ROCm 10): 🚫 Run #35168832637

@hnyls2002
hnyls2002 added this pull request to stack #39669 September 15, 2026 22:43
@hnyls2002
hnyls2002 removed this pull request from stack #39669 September 15, 2026 22:56
@hnyls2002
hnyls2002 added this pull request to stack #39672 September 15, 2026 22:58
Base automatically changed from dsv4.1-mhc to main September 17, 2026 00:11
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/tag-and-rerun-ci

@hnyls2002 hnyls2002 added the run-ci CI: run the baseline test suite on this PR label Sep 17, 2026
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/rerun-test test/registered/unit/multimodal/test_processor_async_call_sites.py test/registered/unit/utils/test_hf_transformers.py test/registered/unit/utils/test_hf_transformers_loading.py test/registered/unit/configs/test_model_config_scaling.py

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github-actions Bot commented Sep 17, 2026 •

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Results for /rerun-test test/registered/unit/multimodal/test_processor_async_call_sites.py test/registered/unit/utils/test_hf_transformers.py test/registered/unit/utils/test_hf_transformers_loading.py test/registered/unit/configs/test_model_config_scaling.py:

🚀 ubuntu-latest (4 tests): ✅ View workflow run

cd test/ && python3 registered/unit/multimodal/test_processor_async_call_sites.py
cd test/ && python3 registered/unit/utils/test_hf_transformers.py
cd test/ && python3 registered/unit/utils/test_hf_transformers_loading.py
cd test/ && python3 registered/unit/configs/test_model_config_scaling.py

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