[Radix Cache] Sync Rust TreeCore and make it the default

[Jialin]

Use Rust as the default unified tree core and resolve unsupported configurations to Python in one central place. Synchronize these Python behaviors:

Original Python PR	Rust change
#38356 — Logical-page placement	Preserve rotation_base through insertion and splitting, and reject incompatible grafts before transferring KV ownership.
#37503 — HiCache accounting	Count every unbacked Full-KV eviction within a native step, including cascades, and report tracked_unbacked_tokens.
#37795 — Eviction-policy configuration	Forward SLRU's protected_threshold and validate policy parameters. The cutoff orders probationary nodes before protected nodes while preserving LRU order within each segment; the original policy came from #18843.
#34012 — T-LRU eviction	Port tail-first eviction with integer or floating-point threshold and next_prompt_estimate, preserving Python’s arithmetic order and exact integer/float comparisons. Track path depth and branch high-water history through device/host insertion and splits, retaining history after eviction so repeated trimming stops at the original budget.
#33777 — Write-back host pressure	Preserve insertion order when reclaiming Full host duplicates, including removals and new backups. Register new copies at acknowledgment so pending internal splits publish their prefix before their suffix. Retain device-resident SWA host backups under SWA pressure, matching Python's Full-only duplicate prepass; ordinary host-only SWA eviction remains available.
#38462 — Host-duplicate reclamation	Honor SGLANG_HICACHE_SKIP_HOST_DUPLICATE_RECLAIM in native eviction.
#38269 — SWA layout-aware reuse	Use the allocator's actual request-ring capability for SWA matching. This preserves ring prefix reuse without HiCache and rejects paged-SWA hits without the required window, including DSV4.1 encoder replay + DSpark + HiCache configurations from #38798.
#39283 — SWA buffer-mode prefetch	Port swa_tombstone_ranges and attach_swa_window, including repairs that split existing nodes, preserving KV ownership, locks, pending write-through actions and namespace/page offsets.
#37507 — Unified-memory HiCache	Preserve exact Full-row anchors for SWA load-back, including resident-row holes, and resolve current physical SWA rows before backup after compaction.
#40680 — Internal Mamba write-back	Back up internal Mamba state before eviction, wait for acknowledgment and retain resident Full KV. Reclaim host-state capacity first; preserve the legacy drop on allocation failure and device state on submission/acknowledgment exceptions.
#40712 — Internal SWA write-back	Preserve eligible internal SWA windows before eviction. Pause for the controller to reclaim capacity for the whole unbacked window and finish its host backup, then resume safely after success or allocation failure.
#41092 — Drain pending backups before internal Mamba write-back	Reuse the shared pre-backup ACK drain from native internal eviction; run the pending-SWA/internal-Mamba regression on both backends and preserve allocation-failure behavior.
#41276 — Component eviction cursors and lock receipts	Preserve main's component-indexed cursors and device/host lock-receipt maps in the rebased adapter and parity tests, including missing-receipt error handling.
#41325 — Extensible sliding-window caching	Expose per-component protected sizes and release an SWA window's receipt independently, retaining peer Full/Mamba locks and the root/skipped-component behavior.
#41328 — Per-cache backend selection and LMCache cursors	Honor each cache's backend override before the centralized compatibility fallback, preserving environment defaults for other caches and main's LMCache cursor fix.

Centralized Python fallback applies to both default and explicit Rust selection for:

• Session-aware caching.
• C128 or other unsupported components.
• Custom component overrides.
• Non-Linux platforms.
• PyTorch versions outside 2.11–2.13, or unrecognized versions.
• Devices other than CPU or CUDA.
• Installations containing neither the Rust extension nor its sources.
• Source builds with a missing or unusable Rust toolchain.

Trusted bundled extensions need no compiler. Supported configurations continue to surface build, import and runtime errors. Rust exports return PyResult: ordinary Python errors pass through unchanged, and unexpected native panics become RuntimeError in the binding. The Python adapter holds the concrete binding directly. Panic handling stays outside the mutex scope, so a core interrupted by a panic remains poisoned and subsequent calls refuse to reuse it. Production, inspection, bigram, constructor and tensor-return paths are covered.

T-LRU supports integer and floating-point parameters with Python's operation order, rounding and exact integer/float comparisons, including NaN and infinity. Integer-only parameters retain the exact tail-budget path. Mixed integer estimates must fit i128; larger values raise OverflowError at construction, and checked native addition panics on overflow. Priority evaluation uses native scalar arithmetic without allocation or Python callbacks. T-LRU adds two counters per node (16 bytes on 64-bit platforms); its ancestor history walk runs only for T-LRU and costs O(path nodes).

One insertion-ordered NodeSet serves device leaves, host leaves and Full host duplicates. It preserves constant-time membership/removal, amortized constant-time insertion and exact-size iteration. Leaf eviction still ranks candidates in its policy heap; Full duplicate reclamation follows Python's insertion order.

Auxiliary eviction respects each component's own transfer/request locks. An unrelated Full load or expanded SWA backup must not pin independently restored auxiliary state. Actual transfer sources/destinations and Full leaf guards remain protected. Deferred Mamba and SWA eviction revalidate the victim after the controller's backup attempt, preserve device state on submission/acknowledgment exceptions, and retain progress when host allocation fails. For built-in Mamba and SWA, both Python and Rust return internal backup requests to the shared controller, then resume through the same required finish methods. Python components return immutable backup requests containing the victim and required host capacity; the core owns pending-request validation, without adding backup bookkeeping to TreeComponent. Python preserves its session-aware cursor ordering; both cores consume pending requests and report frees and eviction counts through the same interface. Custom SWA component types retain their inherited Python behavior.

Hybrid transfer plans cross the binding in Python's component order, removing native HashMap nondeterminism. The shared host allocator now follows main's pool-name ordering from #40512; paired host-pressure expectations follow that order. Main's unified-memory decode host pools (#39478) use the shared controller path and need no separate native port.

The real default-cache test exercises construction, insertion and matching without factory mocks. Shared inspections replace native-specific test skips. This update removes the internal-SWA Rust skip and five obsolete Full+SWA+Mamba HiCache skips, enabling the now-supported hybrid fixtures. Legitimate configuration-applicability guards remain. Session cases in a Rust-selected run exercise centralized Python fallback. External backends implement the abstract SWA repair and internal-eviction finish methods. The README covers usage, supported configurations, builds and the controller/core contract; parity-port history remains in this PR description.

Validation of head 85e244caa9, based on main fc9e1c8d29:

• Local CPU: 531 tests and 43 subtests passed, with one existing CUDA-only skip. Includes direct component-response coverage, phase/session/custom-component/missing-pool cases, full core/registry/error/inspection/session coverage, and submission/ACK failure restart checks. All 36 actual shared write-back scenarios passed across Python/Rust: 12 Mamba, 20 SWA and four pending-SWA/internal-Mamba ([HiCache] fix: Drain pending backups before internal Mamba write-back #41092) cases.
• Rust core and binding sources are unchanged from f705c05736, which passed 918 native tests and both configured and binding-enabled Clippy checks. The Python checks use that same native implementation for differential coverage.
• Pinned Python lint/format/import checks and patch whitespace checks passed; the preceding README cleanup passed spelling checks. Independent review found no blocker in the response ownership, common finish contract, accounting, session cursor order or failure cleanup.
• Fresh NVIDIA CI at 85e244caa9: Lint passed. Base completed successfully on attempt 1: 721 CPU files across 11 shards, GPU Stage A (63 passes; two existing FA3 hardware skips), all 19 Stage B GPU jobs (320 files), all 15 Stage C GPU jobs (47 files), and the final workflow gate passed. Both shared cache GPU suites passed (1,289 passes and 1,494 unchanged applicability skips each); the Rust-requested total includes intentional Python session fallbacks, while supported SWA/Mamba write-back cases assert the resolved backend. Extra completed successfully on unchanged-head attempt 3: all 19 GPU shards, 163 files, 919 passing test executions, and its final workflow gate passed. The repeated GLM5.3 Flash H200 accuracy failure recovered with HighThroughput 0.936 and LowLatency 0.950, both without a built-in retry. The earlier 0.926→0.928 failure also occurred in an independently verified Python-backed control with the same test and model. Successful executions were retained across the two failed-jobs reruns; no code, thresholds, or skips were changed. These runs tested merge bf722e6a1a8c7d243703d306b9b6a00dc8834ab0, combining this head with main df1fc6ab6441abbdf21944958b131c03e0921253. Later main #41281 received a static compatibility review; it was not executed by these runs.

The preceding head f705c05736 passed Base and Extra: all 720 CPU files, 36 Base GPU jobs and 18 Extra GPU jobs; Lint also passed. Both shared cache suites ran 2,783 cases, with 1,289 passes and 1,494 matching applicability skips. Base required one unchanged-code Inkling retry with a different runner/input sample; no thresholds or skips changed. These are baseline results; the Python refactor requires its own CI run.

Local tests use CPU Torch and simulated transfer boundaries; they do not establish GPU numerical equivalence. Rotation has simulated-rank/core coverage. Session-aware/C128 fallback and hardware/configuration applicability guards remain explicit. Validation is focused on NVIDIA; unrelated platform workflows are not claimed green.

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CI States

Latest PR Test (Base): ✅ Run #36465147486
Latest PR Test (Extra): ✅ Run #36465147105
Latest PR Test (AMD ROCm 10): ❌ Run #36465147465

[Jialin]

/rerun-failed-ci extra

09/16 11:35AM PT: accuracy minor gap

[hzh0425]

All tests have passed

[hzh0425]

/rerun-extra-ci

[github-actions]

🚀 Re-running PR Test Extra.

[Jialin]

/rerun-failed-ci

[alphabetc1]

all nv ci have passed cc@ispobock