[michaelzhang-ai]

Motivation

#37436 stripped register_amd_ci from API/control-plane tests that NVIDIA still gates every PR. Those files accounted for most of the 2026-09-07 coverage drop (94.9% → 92.8%).

This restores AMD on the four high-signal files from that drop, plus the tensor-dump hook that #37436 re-enabled on CUDA only. HTTP/2, request-length/stop validation, engine child PIDs, request-queue validation, and priority metrics stay CUDA/CPU-only — those are backend-agnostic control-plane checks.

Modifications

Re-add enabled register_amd_ci(..., suite="stage-b-test-1-gpu-small-amd") on:

File	ROCm path only an AMD run covers	est_time
openai_server/function_call/test_openai_function_calling.py	llama3 and pythonic parsers run on real decoded text, so ROCm decode divergence surfaces as tool calls that no longer parse; NPU nightly registration was kept in #37436	73s
openai_server/function_call/test_anthropic_tool_use.py	Streaming tool-argument assembly is rebuilt from incremental decode output, so ROCm chunk-boundary divergence surfaces here	140s
reasoning/test_reasoning.py	Thinking-token and separate-reasoning assertions read decoded output from a 30B MoE (Qwen3-30B-A3B), so a ROCm fused-MoE or sampling regression shows up as malformed reasoning_content	200s
debug_utils/test_tensor_dump_forward_hook.py	Hook resolves get_device() and the matching distributed backend, so only AMD exercises the HIP device and dump path; CUDA was re-enabled in #37436	15s
observability/test_tracing.py	Span assertions require PREFILL_FORWARD/DECODE_FORWARD to be emitted from the scheduler forward path, which ROCm reaches through its own attention backend and graph replay; CUDA stays extra-a	113s

Per the admission ratchet that #37436 added to test/README.md — a file registered on CUDA plus another accelerator must carry a nearby backend-specific: comment naming the path or failure mode only that backend can catch — each restored registration now has that rationale in source. All five are far under the 1,200 weighted accelerator-second default-lane cap, so no ci-cost-override: is needed. scripts/lint/check_registered_tests.py passes.

Not restored (intentionally CUDA/CPU-only): HTTP/2 server, large-max-new-tokens / matched-stop / request-length validation, engine child PIDs, request-queue validation, priority metrics. The grok aggregate stub deleted in #37436 is also left out — MI30x grok evals already live in the split nightly files.

Coverage effect

Against the AMD coverage dashboard snapshot of 2026-09-10 06:35 UTC, where all five files appear on the NVIDIA Tests Not Run on AMD list with one registration each (four core, one extra, all per-commit):

Metric	Now	With this PR
Headline (AMD enabled ÷ NVIDIA-comparable enabled)	91.3% (639 / 700)	92.0% (644 / 700)
PR % (AMD per-commit ÷ NVIDIA per-commit)	75.3% (497 / 660)	76.1% (502 / 660)
Gap files / registrations	247 / 258	242 / 253
core tier coverage	113.7% (316 / 278)	115.1% (320 / 278)
extra tier coverage	55.3% (42 / 76)	56.6% (43 / 76)

PR % is the number worth reading here. The dashboard notes that the headline is carried up by AMD's much larger nightly surface (Nightly % is 142/40, over 100%), while PR % is what a pull request actually gates on. These five restorations land entirely in the per-commit lane, so they move both.

Runner cost is about 9 min added to stage-b-test-1-gpu-small-amd (serial est_time; the suite is partitioned 14 ways, so wall-clock impact is roughly one partition-slot).

For context on why this is worth doing now rather than later: the gap has grown from 222 files on 2026-09-06 to 247 on 2026-09-10 because NVIDIA registrations are being added at roughly two per day while amd_enabled has been flat (645 → 639). Headline coverage slid 94.9% → 91.3% over those four days without a single AMD registration being removed after #37436.

Accuracy Tests

N/A — CI registration only; no model/kernel code changes.

Speed Tests and Profiling

N/A

Manual AMD CI

Dispatched pr-test-amd-rocm720.yml on 8295c54 because the PR was draft when first opened (pull_request AMD gate skipped). All five restored files passed on ROCm 10 and ROCm 7.2. Workflow-level failure is from pre-existing suite tests (test_deterministic.py, LoRA ROUGE, HIPBLAS MoE, DSV4/MI35x/8-gpu), not this PR.

File	Part	ROCm 10	ROCm 7.2
test_anthropic_tool_use.py	5	passed 108s	passed 113s
test_reasoning.py	9	passed 301s	passed 232s
test_tensor_dump_forward_hook.py	9	passed 15s (same jobs)	passed 14s
test_tracing.py	12	passed 232s	passed 210s
test_openai_function_calling.py	11	passed 149s	passed 143s

Runs:

• Full suite, ROCm 10: https://github.com/sgl-project/sglang/actions/runs/34294614934
• Full suite, ROCm 7.2: https://github.com/sgl-project/sglang/actions/runs/34294617039
• Targeted stage-b-test-1-gpu-small-amd + continue_on_error (needed so part 11 did not fail-fast on test_deterministic.py before the OpenAI function-calling file): ROCm 10, ROCm 7.2

e7d4073 only adds the backend-specific: comments above the registrations, so the AMD results above still apply.

Checklist

• Format your code according to the Format code with pre-commit.
• Add unit tests according to the Run and add unit tests.
• Update documentation according to Write documentations.
• Provide accuracy and speed benchmark results according to Test the accuracy and Benchmark the speed.
• Follow the SGLang code style guidance.

Review and Merge Process

1. Ping Merge Oncalls to start the process. See the PR Merge Process.
2. Get approvals from CODEOWNERS and other reviewers.
3. Trigger CI tests with comments or contact authorized users to do so.
   • Common commands include /tag-and-rerun-ci, /tag-run-ci-label, /rerun-failed-ci
4. After green CI and required approvals, ask Merge Oncalls or people with Write permission to merge the PR.

  

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CI States

Latest PR Test (Base): ❌ Run #34421363232
Latest PR Test (Extra): ❌ Run #34421363043
Latest PR Test (AMD ROCm 10): ❌ Run #34421363223