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[Docs][AMD] Add optimized GLM-5.3-Flash MI355X recipe - #36732

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@andyluo7

@andyluo7 andyluo7 commented Aug 27, 2026

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Motivation

Document the measured GLM-5.3-Flash FP8 serving recipe for 8x MI355X and publish the exact 1K/1K concurrency-1 and concurrency-32 results. The optimized recipe depends on the ROCm engine work in #36607 and the model-specific gfx950 BF16 GEMM tuning in ROCm/aiter#5060.

Modifications

  • Select FP8 KV cache with TileLang DSA for MI355X while retaining the existing BF16/Triton/graph-disabled gfx942 recipes.
  • Use TP8/EP1, AITER MoE, full decode graphs at batch sizes 1 and 32, disabled prefill graphs, and disabled radix cache for the measured MI355X recipe.
  • Add median TTFT/TPOT and total-throughput-per-GPU rows for concurrency 1 and 32.
  • Document exact request accounting, aggregate throughput, median interactivity, engine/AITER revisions, and the distinction between the speed run and the earlier full GSM8K accuracy run.
  • Keep CUDA selections unchanged; TRT-LLM DSA remains CUDA-only.

Accuracy Tests

The existing MI355X accuracy result is retained and explicitly identified as a separate run:

The performance run completed all 330 requests with exact 1,024-token inputs and outputs and empty error strings.

Speed Tests and Profiling

Hardware and software:

Concurrency Requests Aggregate total throughput Total throughput/GPU Median TTFT Median TPOT Median interactivity
1 10/10 287.8493 tok/s 35.9812 tok/s/GPU 84.8435 ms 6.8675 ms 145.6126 tok/s/user
32 320/320 5,731.3649 tok/s 716.4206 tok/s/GPU 514.8845 ms 10.6696 ms 93.7246 tok/s/user

Against the recorded 8x B200 baseline, MI355X reached 90.18% / 89.11% of B200 total throughput / median interactivity at concurrency 1 and 101.07% / 98.35% at concurrency 32. The B200 raw JSON is not locally available, so the docs publish only independently preserved MI355X measurements rather than presenting the comparison as a new revalidation.

Validation

  • node docs/scripts/check_cookbook_configs.mjs
  • pre-commit run --files docs/cookbook/autoregressive/GLM/GLM-5.3-Flash.mdx docs/src/snippets/configs/zai-org/glm-5.3-flash.jsx docs/src/snippets/configs/zai-org/glm-5.3-flash-benchmarks.jsx
  • npx -y mint@latest validate
  • Static assertion of all MI355X flags and absence of TRT-LLM DSA, DeepGEMM, and --disable-cuda-graph in the MI355X cell.
  • Direct extraction of TTFT, TPOT, throughput, token lengths, completion counts, and error counts from the saved benchmark JSON.

Checklist

  • Format and changed-file pre-commit checks pass.
  • Cookbook config validation passes.
  • Mintlify build validation passes.
  • Documentation updated with exact platform, topology, dependencies, and benchmark protocol.
  • Accuracy and speed provenance are separated.

CI States

Latest PR Test (Base): ✅ Run #33117751830
Latest PR Test (Extra): ❌ Run #33117751273
Latest PR Test (AMD ROCm 7.2): ➖ No AMD PR run found for this commit.

@andyluo7

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Local validation is complete (check_cookbook_configs, changed-file pre-commit, and Mintlify build validation). The current gate failures are only the expected missing run-ci / run-ci-extra labels; could a maintainer please apply the appropriate CI label for this docs-only PR?

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