[diffusion] Fix Hunyuan QKV pack indexing at production video shapes - #36009
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…n-transport1 * 'main' of https://github.com/sgl-project/sglang: (326 commits) [diffusion] feat: cache LoRA-merged weights in files the page cache can hold (sgl-project#36062) [diffusion] Speed up LingBot high-quality VAE decode (sgl-project#36024) [diffusion] Honor XDG cache for model overlays (sgl-project#36019) Support streaming session on NPU (sgl-project#32597) fix(xpu): read enable_deterministic_inference from the config bag (sgl-project#36149) xeon ci fail fast strategy change (sgl-project#36146) [diffusion] Fix Hunyuan QKV pack indexing at production video shapes (sgl-project#36009) [diffusion] Refresh quality and BCG benchmark skills (sgl-project#36016) [MoE] Gather the cutlass MoE activation and its scales in one launch (sgl-project#34915) [diffusion] feat: add plain component weight overrides (sgl-project#36086) [diffusion] feat: support loading mixed w4a8 text encoders (sgl-project#36037) [diffusion] Default Hunyuan VAE to tiled decode (sgl-project#36012) fix(xpu): enable compressed-tensors FP8 W8A8 on XPU (RedHatAI FP8-dynamic models) (sgl-project#33057) chore: move cuda_vmm_utils.py under srt/utils/ (sgl-project#36053) [Intel XPU] Add xpu pass for biased_topk and hash_topk (sgl-project#33323) [CPU] Fix NUMA/core binding for DP ranks (sgl-project#32856) [Fix] Harden FlashAttention CUDA graph metadata bounds (sgl-project#35454) [XPU] Use a fused GDN kernel from sgl-kernel for Qwen3.5 (sgl-project#33354) [diffusion] Fuse LongCat-Image QKNorm and interleaved RoPE (sgl-project#35995) [diffusion] Keep LongLive2 components resident on large GPUs (sgl-project#35993) ... # Conflicts: # python/sglang/srt/multimodal/processors/base_processor.py # python/sglang/srt/server_args.py
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Summary
Root cause
FastHunyuan at 1280x720x125 frames produces 115,200 image tokens. The merged projection has a 21,504-element row stride, so the final row offset is 2,477,239,296 elements. The Triton program ID was inferred as int32 and overflowed while addressing the strided V view, causing an illegal memory access.
Casting the token index to int64 keeps the derived row-address arithmetic wide without changing the kernel layout or numerics.
H200 validation
This is a production-shape correctness fix, not a >=1.5% performance claim.
Tests
CI States
Latest PR Test (Base): ✅ Run #32643228721
Latest PR Test (Extra): ✅ Run #32664629121
Latest PR Test (AMD ROCm 7.2): ⏳ Run #32643228882