Fix Nightly NV CI - #33564
Fix Nightly NV CI#33564
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/rerun-test test/registered/8-gpu-models/test_longcat_flash_lite_fp8.py |
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/rerun-test test/registered/8-gpu-models/test_glm52_fp8.py |
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LongcatFlashConfig normalizes architectures to LongcatFlashForCausalLM, which
sits in _DEEPSEEK_FAMILY_ARCHS, so _deepseek_moe_quant_resolution forced
moe_runner_backend=flashinfer_trtllm on SM100. LongCat picks its top-12 from
n_routed_experts + zero_expert_num (256 + 128) logits and splits the identity
experts out afterwards, which trtllm-gen's internal routing cannot express --
it only sees the 256 routed logits. The nightly B200 run hit the guard:
assert TopKOutputChecker.format_is_bypassed(topk_output)
Exclude the LongCat archs from that override so they fall back to auto
(deep_gemm/triton), the path that scored gsm8k 0.935 on H200.
Also skip the TP8+EP8+deepep variant: DeepEP's low-latency dispatch asserts
num_topk <= kNumMaxTopK (11 in internode_ll.cu) and LongCat moe_topk is 12,
so the variant has never been runnable since #30975 made --moe-a2a-backend
take effect for LongCat.
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/rerun-test test/registered/8-gpu-models/test_longcat_flash_lite_fp8.py |
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Results for 🚀 🚀 |
sgl-project#33779) Co-authored-by: Brayden Zhong <b8zhong@uwaterloo.ca> Signed-off-by: Sage Ahrac <sagiahrak@gmail.com>
Co-authored-by: Brayden Zhong <brayden@radixark.ai> Co-authored-by: Baizhou Zhang <sobereddiezhang@gmail.com>
Co-authored-by: Brayden Zhong <brayden@radixark.ai> Co-authored-by: Baizhou Zhang <sobereddiezhang@gmail.com>
NgramEmbeddingpassedexclusive_oe_embedder_size_sums[-1](a 0-dim CUDA tensor) asnum_embeddings, so the fused Triton embedding kernel got a tensor where it wants atl.constexprint and failed to compile. Wrap it inint().Fixes nightly
test_longcat_flash_lite_fp8.py:Verified with a 2-rank repro at the real LongCat-Flash-Lite config: crashes before, passes after, output bit-identical to the non-Triton masked path.
CI States
Latest PR Test (Base): 🚫 Run #31061386671
Latest PR Test (Extra): ❌ Run #31061386535