[dsv4] Trigger MHC prenorm prewarm at weight-load time with rank sync - #29988
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The one-shot MHC prenorm prewarm (sgl-project#27986) triggers lazily inside the first forward that carries tokens, per rank, uncoordinated. On wide-EP disagg prefill (GB200 1p1d dep8) that is fatal: idle EP peers still launch deep_gemm.fp8_fp4_mega_moe every layer and wait for the compiling rank inside its NVLink barrier, which device-traps after 180 s ("DeepGEMM NVLink barrier timeout ... signal=7, target=8") and poisons the context (CUDA error 719 on later launches). Measured on GB200: the 23-bucket burst is 159-166 s on a cold JIT cache, so any >15 s trigger stagger between ranks blows the barrier budget. Fix: drive prewarm_mhc_pre() from the tail of load_weights on every rank — before the memory pool, CUDA-graph capture, and any forward — then barrier on the TP group so no rank proceeds while a peer still compiles, and empty_cache so the transient prewarm buffers don't skew KV-pool sizing. With the trigger out of the forward path, the in-forward gate and the mhc_pre/_mhc_pre_impl split (which existed only so the prewarm replay would not re-enter mhc_pre) lose their reason to exist: remove them and make mhc_pre the single implementation again. Also drop the orphaned prewarm_mhc_token_counts/_buckets pair (added by sgl-project#25810, removed by sgl-project#26238, resurrected without a caller by the sgl-project#25976 merge).
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/rerun-test test/registered/models_e2e/test_deepseek_v4_flash_fp4_megamoe_b200.py test/registered/models_e2e/test_deepseek_v4_flash_fp8_h200.py test/registered/cp/test_deepseek_v4_flash_fp4_b200_cp.py test_mhc_kernels.py |
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Motivation
#27986 made the DSV4 MHC prenorm prewarm trigger lazily inside the first forward that carries tokens — per rank, uncoordinated. On wide-EP disaggregated prefill this is fatal: 0-token EP peers still launch
deep_gemm.fp8_fp4_mega_moeevery layer and wait for the compiling rank inside the kernel's NVLink barrier, which device-traps after 180 s. The 23-bucket burst (one DeepGEMMtf32_hc_prenorm_gemm+ one TileLang big-fuse variant per bucket) measures 159–166 s on a cold JIT cache on GB200, so any >~15 s trigger stagger between ranks blows the budget:Reproduces deterministically on GB200 disagg 1p1d dep8-dep16 (8k1k); currently worked around by
SGLANG_DSV4_MHC_PREWARM=0. Single-node dep4 setups pass only because their triggers happen to align (skew ≪ 180 s) — verified by a synthetic 4-rank repro where a single 200 s host stall reproduces the exact barrier-timeout signature.Modifications
DeepseekV4ForCausalLM.load_weightson every rank — before the memory pool, CUDA-graph capture, and any forward — thenget_tp_group().barrier()so no rank proceeds while a peer is still compiling, andtorch.cuda.empty_cache()(this now runs beforeinit_memory_pool, so the multi-GB transient prewarm buffers must not skew KV-pool sizing).load_weights(e.g. kernel unit tests); add prewarm duration + rank-sync logs.prewarm_mhc_token_counts/_bucketspair (added by perf(dsv4): add MHC token-count prewarm #25810, removed by refactor(dsv4): route MHC prenorm through DeepGEMM wrapper #26238, resurrected without a caller by the [DeepSeek-V4] Add mhc_fused_post_pre kernel #25976 merge).Accuracy Tests
No kernel/model math changes — the prewarm replays the existing
_mhc_pre_implpath with dummy inputs at load time (same code the lazy trigger ran). Server responses validated on DSV4-Flash (TP4+DP4+deepep) and DSV4-Pro (disagg dep8/dep16).Speed Tests and Profiling
A/B on GB200 disagg 2-node dep8 prefill + 4-node dep16 decode — same recipe, container, and base commit; the only difference is this patch:
Startup cost is unchanged (~160 s one-shot on a cold JIT cache; ~0 s warm — same as the lazy trigger paid, just moved off the serving path and aligned across ranks).
Checklist
CI States
Latest PR Test (Base): ❌ Run #28634631368
Latest PR Test (Extra): ❌ Run #28634631251