[AMD] Support Qwen3-Coder-Next on AMD platform#18355
[AMD] Support Qwen3-Coder-Next on AMD platform#18355HaiShaw merged 6 commits intosgl-project:mainfrom
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Summary of ChangesHello @yichiche, I'm Gemini Code Assist1! I'm currently reviewing this pull request and will post my feedback shortly. In the meantime, here's a summary to help you and other reviewers quickly get up to speed! This pull request introduces critical updates to enable and optimize the Qwen3-Coder-Next model's performance and compatibility on AMD platforms. The changes focus on improving the robustness of attention mechanism configurations by correctly handling model-specific parameters and adapting dual-stream behavior for AMD GPUs. Additionally, it enhances dependency management for optional performance optimizations, leading to a more stable and compatible experience for users deploying Qwen3-Coder-Next on AMD hardware. Highlights
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Code Review
This pull request introduces support for Qwen3-Coder-Next on the AMD platform. The changes are well-structured and improve the codebase's robustness and modularity. Key modifications include a more reliable method for determining v_head_dim in aiter_backend.py to accommodate various model architectures, and making the CuTe DSL dependency optional in hybrid_linear_attn_backend.py with clear error handling. I have one suggestion to make the exception handling more specific, which will improve maintainability.
python/sglang/srt/layers/attention/hybrid_linear_attn_backend.py
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I see the test uses |
With the change from --chunked-prefill-size 32768 to 131072, we see TTFT improvement from 887.24 to 838.34 (6% uplift). |
- aiter_backend.py: Handle v_head_dim correctly for MLA and hybrid linear models. Previously, v_head_dim was retrieved directly from token_to_kv_pool.get_value_buffer(0), which fails for models where layer 0 may not be a full attention layer. Now properly handles MLA models (using model config), hybrid linear models (using get_v_head_dim()), and standard models. - qwen3_next.py: Use is_cuda_alike() instead of is_cuda() to enable CUDA stream creation on both NVIDIA CUDA and AMD ROCm/HIP devices.
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Solve conflict and rebase again. |
This reverts commit a4650f8.
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@yichiche do we currently have test coverage for this model or this model arch in our CI? |
Co-authored-by: yichiche@amd.com <jacky.cheng>
@hubertlu-tw yes, this is in another PR: #18608 |
Co-authored-by: yichiche@amd.com <jacky.cheng>
Co-authored-by: yichiche@amd.com <jacky.cheng>
Motivation
Enable Qwen3-Coder-Next model on AMD GPU platform. With this PR, we are able to support non-MTP (fp8 kv cache) and MTP on Qwen3-Coder-Next.
Modifications
Accuracy Tests
Accuracy: 0.944
Invalid: 0.000
Latency: 55.824 s
Output throughput: 3066.797 token/s
Benchmarking and Profiling
Env: MI355 * 8
Checklist
Review Process
/tag-run-ci-label,/rerun-failed-ci,/tag-and-rerun-ci