[Qwen3Next] Optimize fused_sigmoid_gating_delta_rule_update_kernel#18271
[Qwen3Next] Optimize fused_sigmoid_gating_delta_rule_update_kernel#18271Fridge003 merged 1 commit intosgl-project:mainfrom
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Summary of ChangesHello @hlu1, I'm Gemini Code Assist1! I'm currently reviewing this pull request and will post my feedback shortly. In the meantime, here's a summary to help you and other reviewers quickly get up to speed! This pull request focuses on enhancing the performance of a critical kernel, Highlights
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Code Review
This pull request introduces a performance optimization for the fused_sigmoid_gating_delta_rule_update_kernel by increasing the block size for the V dimension. This is a sound change, and the provided benchmarks confirm its effectiveness in reducing kernel execution time. The change is well-targeted and improves performance. I have no specific comments on the code change itself, as it is a clear improvement. For future consideration, a similar optimization might be applicable to fused_recurrent_gated_delta_rule_update_fwd in python/sglang/srt/layers/attention/fla/fused_recurrent.py, which currently appears to use a smaller block size limit.
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cc @samuellees |
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/tag-and-rerun-ci |
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/rerun-stage stage-c-test-4-gpu-h100 |
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✅ Triggered |
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Qwen3 next tests passed |
Motivation
Apply the same optimization in #17094 to
fused_sigmoid_gating_delta_rule_update_kernelwhich is actually used in the model code.Accuracy Tests
gpqa with the thinking checkpoint
Repeat: 8, mean: 0.772
Scores: ['0.747', '0.783', '0.747', '0.763', '0.808', '0.753', '0.793', '0.783']
Benchmarking and Profiling
TP4, 1k/1k, bs = 512, on 4xB200
The kernel time is reduced from 121 us to 76, and we can see that the grid size is also smaller [1, 16, 4k] to [1, 4, 4k] while the block size is the same. The TPOT is reduced from 35.79 ms to 34.64.
Before:
After:
Before:

After:

Checklist
Review Process
/tag-run-ci-label,/rerun-failed-ci,/tag-and-rerun-ci