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Rollup of 6 pull requests #97909

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hexagon: adapt test for upstream output changes
The output of IR formatting changed slightly in upstream rev
a0bc67e
(https://reviews.llvm.org/D123096). I'm not actually sure what any of
that means, as I don't even know what hexagon is in this context, but
this change allows the test to pass on both old and new LLVMs.

r? @nikic
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durin42 committed Jun 7, 2022
commit d92e213e3d2470e16c5e0107a9d6e41f54a40342
6 changes: 3 additions & 3 deletions src/test/assembly/asm/hexagon-types.rs
Original file line number Diff line number Diff line change
@@ -73,7 +73,7 @@ macro_rules! check_reg {

// CHECK-LABEL: sym_static:
// CHECK: InlineAsm Start
// CHECK: r0 = #extern_static
// CHECK: r0 = {{#+}}extern_static
// CHECK: InlineAsm End
#[no_mangle]
pub unsafe fn sym_static() {
@@ -88,7 +88,7 @@ pub unsafe fn sym_static() {

// CHECK-LABEL: sym_fn:
// CHECK: InlineAsm Start
// CHECK: r0 = #extern_func
// CHECK: r0 = {{#+}}extern_func
// CHECK: InlineAsm End
#[no_mangle]
pub unsafe fn sym_fn() {
@@ -108,7 +108,7 @@ pub unsafe fn sym_fn() {
// CHECK: InlineAsm Start
// CHECK: {
// CHECK: r{{[0-9]+}} = r0
// CHECK: memw(r1) = r{{[0-9]+}}
// CHECK: memw(r1{{(\+#0)?}}) = r{{[0-9]+}}
// CHECK: }
// CHECK: InlineAsm End
#[no_mangle]