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5 changes: 5 additions & 0 deletions compiler/rustc_codegen_cranelift/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -200,6 +200,11 @@ impl CodegenBackend for CraneliftCodegenBackend {
println!("Cranelift version: {}", cranelift_codegen::VERSION);
}

fn has_mnemonic(&self, sess: &Session, mnemonic: &str) -> bool {
// All Cranelift supported targets support ret except for s390x
mnemonic == "ret" && sess.target.arch != Arch::S390x
}

fn target_cpu(&self, sess: &Session) -> String {
// FIXME handle `-Ctarget-cpu=native`
match sess.opts.cg.target_cpu {
Expand Down
4 changes: 4 additions & 0 deletions compiler/rustc_codegen_llvm/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -314,6 +314,10 @@ impl CodegenBackend for LlvmCodegenBackend {
llvm::LLVMRustLLVMHasZstdCompression()
}

fn has_mnemonic(&self, sess: &Session, mnemonic: &str) -> bool {
llvm_util::target_has_mnemonic(sess, mnemonic)
}

fn target_config(&self, sess: &Session) -> TargetConfig {
target_config(sess)
}
Expand Down
12 changes: 4 additions & 8 deletions compiler/rustc_codegen_llvm/src/llvm_util.rs
Original file line number Diff line number Diff line change
Expand Up @@ -480,10 +480,6 @@ pub(crate) fn print(req: &PrintRequest, out: &mut String, sess: &Session) {
match req.kind {
PrintKind::TargetCPUs => print_target_cpus(sess, tm.raw(), out),
PrintKind::TargetFeatures => print_target_features(sess, tm.raw(), out),
PrintKind::BackendHasMnemonic => {
let mnemonic = req.arg.as_deref().expect("BackendHasMnemonic requires arg");
print_target_has_mnemonic(tm.raw(), mnemonic, out)
}
_ => bug!("rustc_codegen_llvm can't handle print request: {:?}", req),
}
}
Expand Down Expand Up @@ -746,9 +742,9 @@ pub(crate) fn tune_cpu(sess: &Session) -> Option<&str> {
Some(handle_native(name))
}

fn print_target_has_mnemonic(tm: &llvm::TargetMachine, mnemonic: &str, out: &mut String) {
use std::fmt::Write;
pub(crate) fn target_has_mnemonic(sess: &Session, mnemonic: &str) -> bool {
require_inited();
let tm = create_informational_target_machine(sess, false);
let cstr = SmallCStr::new(mnemonic);
let has_mnemonic = unsafe { llvm::LLVMRustTargetHasMnemonic(tm, cstr.as_ptr()) };
writeln!(out, "{}", has_mnemonic).unwrap();
unsafe { llvm::LLVMRustTargetHasMnemonic(tm.raw(), cstr.as_ptr()) }
}
8 changes: 8 additions & 0 deletions compiler/rustc_codegen_ssa/src/traits/backend.rs
Original file line number Diff line number Diff line change
Expand Up @@ -92,6 +92,14 @@ pub trait CodegenBackend {
false
}

/// Value printed by `--print=backend-has-mnemonic:...`.
///
/// Used by compiletest to determine whether tests involving `asm!()` should
/// be executed or skipped.
fn has_mnemonic(&self, _sess: &Session, _mnemonic: &str) -> bool {
false
}

/// The metadata loader used to load rlib and dylib metadata.
///
/// Alternative codegen backends may want to use different rlib or dylib formats than the
Expand Down
4 changes: 3 additions & 1 deletion compiler/rustc_driver_impl/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -802,7 +802,9 @@ fn print_crate_info(
println_info!("{}", calling_conventions.join("\n"));
}
BackendHasMnemonic => {
codegen_backend.print(req, &mut crate_info, sess);
let has_mnemonic: bool =
codegen_backend.has_mnemonic(sess, req.arg.as_ref().unwrap());
println_info!("{has_mnemonic}");
}
BackendHasZstd => {
let has_zstd: bool = codegen_backend.has_zstd();
Expand Down
4 changes: 2 additions & 2 deletions compiler/rustc_middle/src/hir/map.rs
Original file line number Diff line number Diff line change
Expand Up @@ -980,8 +980,8 @@ impl<'tcx> TyCtxt<'tcx> {
span,
..
}) => {
// Ensure that the returned span has the item's SyntaxContext.
fn_decl_span.find_ancestor_inside(*span).unwrap_or(*span)
// Ensure that the returned span has the closure expression's SyntaxContext.
fn_decl_span.find_ancestor_inside_same_ctxt(*span).unwrap_or(*span)
}
_ => self.hir_span_with_body(hir_id),
};
Expand Down
18 changes: 0 additions & 18 deletions library/core/src/num/f64.rs
Original file line number Diff line number Diff line change
Expand Up @@ -819,15 +819,6 @@ impl f64 {
!self.is_sign_negative()
}

#[must_use]
#[stable(feature = "rust1", since = "1.0.0")]
#[deprecated(since = "1.0.0", note = "renamed to is_sign_positive")]
#[inline]
#[doc(hidden)]
pub fn is_positive(self) -> bool {
self.is_sign_positive()
}

/// Returns `true` if `self` has a negative sign, including `-0.0`, NaNs with
/// negative sign bit and negative infinity.
///
Expand Down Expand Up @@ -855,15 +846,6 @@ impl f64 {
self.to_bits() & Self::SIGN_MASK != 0
}

#[must_use]
#[stable(feature = "rust1", since = "1.0.0")]
#[deprecated(since = "1.0.0", note = "renamed to is_sign_negative")]
#[inline]
#[doc(hidden)]
pub fn is_negative(self) -> bool {
self.is_sign_negative()
}

/// Returns the least number greater than `self`.
///
/// Let `TINY` be the smallest representable positive `f64`. Then,
Expand Down
58 changes: 36 additions & 22 deletions library/std/tests/sync/mpmc.rs
Original file line number Diff line number Diff line change
Expand Up @@ -419,34 +419,48 @@ fn oneshot_multi_thread_send_recv_stress() {

#[test]
fn stream_send_recv_stress() {
for _ in 0..stress_factor() {
let (tx, rx) = channel();

send(tx, 0);
recv(rx, 0);
thread::scope(|s| {
for _ in 0..stress_factor() {
let (tx, rx) = channel();

send(tx, 0, s);
recv(rx, 0, s);

fn send<'scope, 'env>(
tx: Sender<Box<i32>>,
i: i32,
s: &'scope thread::Scope<'scope, 'env>,
) where
'env: 'scope,
{
if i == 10 {
return;
}

fn send(tx: Sender<Box<i32>>, i: i32) {
if i == 10 {
return;
s.spawn(move || {
tx.send(Box::new(i)).unwrap();
send(tx, i + 1, s);
});
}

thread::spawn(move || {
tx.send(Box::new(i)).unwrap();
send(tx, i + 1);
});
}
fn recv<'scope, 'env>(
rx: Receiver<Box<i32>>,
i: i32,
s: &'scope thread::Scope<'scope, 'env>,
) where
'env: 'scope,
{
if i == 10 {
return;
}

fn recv(rx: Receiver<Box<i32>>, i: i32) {
if i == 10 {
return;
s.spawn(move || {
assert!(*rx.recv().unwrap() == i);
recv(rx, i + 1, s);
});
}

thread::spawn(move || {
assert!(*rx.recv().unwrap() == i);
recv(rx, i + 1);
});
}
}
})
}

#[test]
Expand Down
58 changes: 36 additions & 22 deletions library/std/tests/sync/mpsc.rs
Original file line number Diff line number Diff line change
Expand Up @@ -382,34 +382,48 @@ fn oneshot_multi_thread_send_recv_stress() {

#[test]
fn stream_send_recv_stress() {
for _ in 0..stress_factor() {
let (tx, rx) = channel();

send(tx, 0);
recv(rx, 0);
thread::scope(|s| {
for _ in 0..stress_factor() {
let (tx, rx) = channel();

send(tx, 0, s);
recv(rx, 0, s);

fn send<'scope, 'env>(
tx: Sender<Box<i32>>,
i: i32,
s: &'scope thread::Scope<'scope, 'env>,
) where
'env: 'scope,
{
if i == 10 {
return;
}

fn send(tx: Sender<Box<i32>>, i: i32) {
if i == 10 {
return;
s.spawn(move || {
tx.send(Box::new(i)).unwrap();
send(tx, i + 1, s);
});
}

thread::spawn(move || {
tx.send(Box::new(i)).unwrap();
send(tx, i + 1);
});
}
fn recv<'scope, 'env>(
rx: Receiver<Box<i32>>,
i: i32,
s: &'scope thread::Scope<'scope, 'env>,
) where
'env: 'scope,
{
if i == 10 {
return;
}

fn recv(rx: Receiver<Box<i32>>, i: i32) {
if i == 10 {
return;
s.spawn(move || {
assert!(*rx.recv().unwrap() == i);
recv(rx, i + 1, s);
});
}

thread::spawn(move || {
assert!(*rx.recv().unwrap() == i);
recv(rx, i + 1);
});
}
}
})
}

#[test]
Expand Down
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