Rollup of 11 pull requests

compiler/rustc_codegen_cranelift/src/intrinsics/simd.rs

@@ -348,6 +348,31 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
             ret.write_cvalue(fx, ret_lane);
         }
 
+        sym::simd_splat => {
+            intrinsic_args!(fx, args => (value); intrinsic);
+
+            if !ret.layout().ty.is_simd() {
+                report_simd_type_validation_error(fx, intrinsic, span, ret.layout().ty);
+                return;
+            }
+            let (lane_count, lane_ty) = ret.layout().ty.simd_size_and_type(fx.tcx);
+
+            if value.layout().ty != lane_ty {
+                fx.tcx.dcx().span_fatal(
+                    span,
+                    format!(
+                        "[simd_splat] expected element type {lane_ty:?}, got {got:?}",
+                        got = value.layout().ty
+                    ),
+                );
+            }
+
+            for i in 0..lane_count {
+                let ret_lane = ret.place_lane(fx, i.into());
+                ret_lane.write_cvalue(fx, value);
+            }
+        }
+
         sym::simd_neg
         | sym::simd_bswap
         | sym::simd_bitreverse

compiler/rustc_codegen_gcc/src/intrinsic/simd.rs

@@ -121,6 +121,42 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
         return Ok(bx.vector_select(vector_mask, arg1, args[2].immediate()));
     }
 
+    #[cfg(feature = "master")]
+    if name == sym::simd_splat {
+        let (out_len, out_ty) = require_simd2!(ret_ty, SimdReturn);
+
+        require!(
+            args[0].layout.ty == out_ty,
+            InvalidMonomorphization::ExpectedVectorElementType {
+                span,
+                name,
+                expected_element: out_ty,
+                vector_type: ret_ty,
+            }
+        );
+
+        let vec_ty = llret_ty.unqualified().dyncast_vector().expect("vector return type");
+        let elem_ty = vec_ty.get_element_type();
+
+        // Cast pointer type to usize (GCC does not support pointer SIMD vectors).
+        let value = args[0];
+        let scalar = if value.layout.ty.is_numeric() {
+            value.immediate()
+        } else if value.layout.ty.is_raw_ptr() {
+            bx.ptrtoint(value.immediate(), elem_ty)
+        } else {
+            return_error!(InvalidMonomorphization::UnsupportedOperation {
+                span,
+                name,
+                in_ty: ret_ty,
+                in_elem: value.layout.ty
+            });
+        };
+
+        let elements = vec![scalar; out_len as usize];
+        return Ok(bx.context.new_rvalue_from_vector(bx.location, llret_ty, &elements));
+    }
+
     // every intrinsic below takes a SIMD vector as its first argument
     require_simd!(
         args[0].layout.ty,

compiler/rustc_codegen_llvm/src/intrinsic.rs

@@ -1581,6 +1581,31 @@ fn generic_simd_intrinsic<'ll, 'tcx>(
         return Ok(bx.select(m_i1s, args[1].immediate(), args[2].immediate()));
     }
 
+    if name == sym::simd_splat {
+        let (_out_len, out_ty) = require_simd!(ret_ty, SimdReturn);
+
+        require!(
+            args[0].layout.ty == out_ty,
+            InvalidMonomorphization::ExpectedVectorElementType {
+                span,
+                name,
+                expected_element: out_ty,
+                vector_type: ret_ty,
+            }
+        );
+
+        // `insertelement <N x elem> poison, elem %x, i32 0`
+        let poison_vec = bx.const_poison(llret_ty);
+        let idx0 = bx.const_i32(0);
+        let v0 = bx.insert_element(poison_vec, args[0].immediate(), idx0);
+
+        // `shufflevector <N x elem> v0, <N x elem> poison, <N x i32> zeroinitializer`
+        // The masks is all zeros, so this splats lane 0 (which has our element in it).
+        let splat = bx.shuffle_vector(v0, poison_vec, bx.const_null(llret_ty));
+
+        return Ok(splat);
+    }
+
     // every intrinsic below takes a SIMD vector as its first argument
     let (in_len, in_elem) = require_simd!(args[0].layout.ty, SimdInput);
     let in_ty = args[0].layout.ty;

compiler/rustc_codegen_ssa/src/mir/operand.rs

@@ -1074,8 +1074,14 @@ impl<'a, 'tcx, Bx: BuilderMethods<'a, 'tcx>> FunctionCx<'a, 'tcx, Bx> {
                 if constant_ty.is_simd() {
                     // However, some SIMD types do not actually use the vector ABI
                     // (in particular, packed SIMD types do not). Ensure we exclude those.
+                    //
+                    // We also have to exclude vectors of pointers because `immediate_const_vector`
+                    // does not work for those.
                     let layout = bx.layout_of(constant_ty);
-                    if let BackendRepr::SimdVector { .. } = layout.backend_repr {
+                    let (_, element_ty) = constant_ty.simd_size_and_type(bx.tcx());
+                    if let BackendRepr::SimdVector { .. } = layout.backend_repr
+                        && element_ty.is_numeric()
+                    {
                         let (llval, ty) = self.immediate_const_vector(bx, constant);
                         return OperandRef {
                             val: OperandValue::Immediate(llval),

compiler/rustc_const_eval/src/interpret/intrinsics/simd.rs

@@ -61,6 +61,15 @@ impl<'tcx, M: Machine<'tcx>> InterpCx<'tcx, M> {
                 }
                 self.copy_op(&self.project_index(&input, index)?, &dest)?;
             }
+            sym::simd_splat => {
+                let elem = &args[0];
+                let (dest, dest_len) = self.project_to_simd(&dest)?;
+
+                for i in 0..dest_len {
+                    let place = self.project_index(&dest, i)?;
+                    self.copy_op(elem, &place)?;
+                }
+            }
             sym::simd_neg
             | sym::simd_fabs
             | sym::simd_ceil

compiler/rustc_hir_analysis/src/check/intrinsic.rs

@@ -746,6 +746,7 @@ pub(crate) fn check_intrinsic_type(
         sym::simd_extract | sym::simd_extract_dyn => {
             (2, 0, vec![param(0), tcx.types.u32], param(1))
         }
+        sym::simd_splat => (2, 0, vec![param(1)], param(0)),
         sym::simd_cast
         | sym::simd_as
         | sym::simd_cast_ptr

compiler/rustc_span/src/symbol.rs

@@ -2141,6 +2141,7 @@ symbols! {
         simd_shr,
         simd_shuffle,
         simd_shuffle_const_generic,
+        simd_splat,
         simd_sub,
         simd_trunc,
         simd_with_exposed_provenance,

compiler/rustc_target/src/spec/mod.rs

@@ -1746,10 +1746,14 @@ supported_targets! {
     ("mipsel-unknown-none", mipsel_unknown_none),
     ("mips-mti-none-elf", mips_mti_none_elf),
     ("mipsel-mti-none-elf", mipsel_mti_none_elf),
-    ("thumbv4t-none-eabi", thumbv4t_none_eabi),
+
     ("armv4t-none-eabi", armv4t_none_eabi),
-    ("thumbv5te-none-eabi", thumbv5te_none_eabi),
     ("armv5te-none-eabi", armv5te_none_eabi),
+    ("armv6-none-eabi", armv6_none_eabi),
+    ("armv6-none-eabihf", armv6_none_eabihf),
+    ("thumbv4t-none-eabi", thumbv4t_none_eabi),
+    ("thumbv5te-none-eabi", thumbv5te_none_eabi),
+    ("thumbv6-none-eabi", thumbv6_none_eabi),
 
     ("aarch64_be-unknown-linux-gnu", aarch64_be_unknown_linux_gnu),
     ("aarch64-unknown-linux-gnu_ilp32", aarch64_unknown_linux_gnu_ilp32),

compiler/rustc_target/src/spec/targets/armv4t_none_eabi.rs

@@ -1,4 +1,4 @@
-//! Targets the ARMv4T, with code as `a32` code by default.
+//! Targets the ARMv4T architecture, with `a32` code by default.
 //!
 //! Primarily of use for the GBA, but usable with other devices too.
 //!

compiler/rustc_target/src/spec/targets/armv5te_none_eabi.rs

@@ -1,4 +1,4 @@
-//! Targets the ARMv5TE, with code as `a32` code by default.
+//! Targets the ARMv5TE architecture, with `a32` code by default.
 
 use crate::spec::{Abi, Arch, FloatAbi, Target, TargetMetadata, TargetOptions, base, cvs};
 

compiler/rustc_target/src/spec/targets/armv6_none_eabi.rs

@@ -0,0 +1,29 @@
+//! Targets the ARMv6K architecture, with `a32` code by default.
+
+use crate::spec::{Abi, Arch, FloatAbi, Target, TargetMetadata, TargetOptions, base, cvs};
+
+pub(crate) fn target() -> Target {
+    Target {
+        llvm_target: "armv6-none-eabi".into(),
+        metadata: TargetMetadata {
+            description: Some("Bare ARMv6 soft-float".into()),
+            tier: Some(3),
+            host_tools: Some(false),
+            std: Some(false),
+        },
+        pointer_width: 32,
+        arch: Arch::Arm,
+        data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
+        options: TargetOptions {
+            abi: Abi::Eabi,
+            llvm_floatabi: Some(FloatAbi::Soft),
+            asm_args: cvs!["-mthumb-interwork", "-march=armv6", "-mlittle-endian",],
+            features: "+soft-float,+strict-align,+v6k".into(),
+            atomic_cas: true,
+            has_thumb_interworking: true,
+            // LDREXD/STREXD available as of ARMv6K
+            max_atomic_width: Some(64),
+            ..base::arm_none::opts()
+        },
+    }
+}

compiler/rustc_target/src/spec/targets/armv6_none_eabihf.rs

@@ -0,0 +1,29 @@
+//! Targets the ARMv6K architecture, with `a32` code by default, and hard-float ABI
+
+use crate::spec::{Abi, Arch, FloatAbi, Target, TargetMetadata, TargetOptions, base, cvs};
+
+pub(crate) fn target() -> Target {
+    Target {
+        llvm_target: "armv6-none-eabihf".into(),
+        metadata: TargetMetadata {
+            description: Some("Bare ARMv6 hard-float".into()),
+            tier: Some(3),
+            host_tools: Some(false),
+            std: Some(false),
+        },
+        pointer_width: 32,
+        arch: Arch::Arm,
+        data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
+        options: TargetOptions {
+            abi: Abi::EabiHf,
+            llvm_floatabi: Some(FloatAbi::Hard),
+            asm_args: cvs!["-mthumb-interwork", "-march=armv6", "-mlittle-endian",],
+            features: "+strict-align,+v6k,+vfp2,-d32".into(),
+            atomic_cas: true,
+            has_thumb_interworking: true,
+            // LDREXD/STREXD available as of ARMv6K
+            max_atomic_width: Some(64),
+            ..base::arm_none::opts()
+        },
+    }
+}

compiler/rustc_target/src/spec/targets/powerpc64_unknown_linux_musl.rs

@@ -17,8 +17,8 @@ pub(crate) fn target() -> Target {
         llvm_target: "powerpc64-unknown-linux-musl".into(),
         metadata: TargetMetadata {
             description: Some("64-bit PowerPC Linux with musl 1.2.5".into()),
-            tier: Some(3),
-            host_tools: Some(false),
+            tier: Some(2),
+            host_tools: Some(true),
             std: Some(true),
         },
         pointer_width: 64,

compiler/rustc_target/src/spec/targets/thumbv4t_none_eabi.rs

@@ -1,4 +1,4 @@
-//! Targets the ARMv4T, with code as `t32` code by default.
+//! Targets the ARMv4T architecture, with `t32` code by default.
 //!
 //! Primarily of use for the GBA, but usable with other devices too.
 //!

compiler/rustc_target/src/spec/targets/thumbv5te_none_eabi.rs

@@ -1,4 +1,4 @@
-//! Targets the ARMv5TE, with code as `t32` code by default.
+//! Targets the ARMv5TE architecture, with `t32` code by default.
 
 use crate::spec::{Abi, Arch, FloatAbi, Target, TargetMetadata, TargetOptions, base, cvs};
 

compiler/rustc_target/src/spec/targets/thumbv6_none_eabi.rs

@@ -0,0 +1,30 @@
+//! Targets the ARMv6K architecture, with `t32` code by default.
+
+use crate::spec::{Abi, Arch, FloatAbi, Target, TargetMetadata, TargetOptions, base, cvs};
+
+pub(crate) fn target() -> Target {
+    Target {
+        llvm_target: "thumbv6-none-eabi".into(),
+        metadata: TargetMetadata {
+            description: Some("Thumb-mode Bare ARMv6 soft-float".into()),
+            tier: Some(3),
+            host_tools: Some(false),
+            std: Some(false),
+        },
+        pointer_width: 32,
+        arch: Arch::Arm,
+        data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
+        options: TargetOptions {
+            abi: Abi::Eabi,
+            llvm_floatabi: Some(FloatAbi::Soft),
+            asm_args: cvs!["-mthumb-interwork", "-march=armv6", "-mlittle-endian",],
+            features: "+soft-float,+strict-align,+v6k".into(),
+            // CAS atomics are implemented in LLVM on this target using __sync* functions,
+            // which were added to compiler-builtins in https://github.com/rust-lang/compiler-builtins/pull/1050
+            atomic_cas: true,
+            has_thumb_interworking: true,
+            max_atomic_width: Some(32),
+            ..base::arm_none::opts()
+        },
+    }
+}

library/core/src/hint.rs

@@ -292,9 +292,18 @@ pub fn spin_loop() {
             // SAFETY: the `cfg` attr ensures that we only execute this on aarch64 targets.
             unsafe { crate::arch::aarch64::__isb(crate::arch::aarch64::SY) }
         }
-        all(target_arch = "arm", target_feature = "v6") => {
-            // SAFETY: the `cfg` attr ensures that we only execute this on arm targets
-            // with support for the v6 feature.
+        all(
+            target_arch = "arm",
+            any(
+                all(target_feature = "v6k", not(target_feature = "thumb-mode")),
+                target_feature = "v6t2",
+                all(target_feature = "v6", target_feature = "mclass"),
+            )
+        ) => {
+            // SAFETY: the `cfg` attr ensures that we only execute this on arm
+            // targets with support for the this feature. On ARMv6 in Thumb
+            // mode, T2 is required (see Arm DDI0406C Section A8.8.427),
+            // otherwise ARMv6-M or ARMv6K is enough
             unsafe { crate::arch::arm::__yield() }
         }
         target_arch = "loongarch32" => crate::arch::loongarch32::ibar::<0>(),

library/core/src/intrinsics/simd.rs

@@ -52,6 +52,13 @@ pub const unsafe fn simd_insert_dyn<T, U>(x: T, idx: u32, val: U) -> T;
 #[rustc_intrinsic]
 pub const unsafe fn simd_extract_dyn<T, U>(x: T, idx: u32) -> U;
 
+/// Creates a vector where every lane has the provided value.
+///
+/// `T` must be a vector with element type `U`.
+#[rustc_nounwind]
+#[rustc_intrinsic]
+pub const unsafe fn simd_splat<T, U>(value: U) -> T;
+
 /// Adds two simd vectors elementwise.
 ///
 /// `T` must be a vector of integers or floats.

library/std/src/net/hostname.rs

@@ -8,10 +8,10 @@ use crate::ffi::OsString;
 ///
 /// # Underlying system calls
 ///
-/// | Platform | System call                                                                                             |
-/// |----------|---------------------------------------------------------------------------------------------------------|
-/// | UNIX     | [`gethostname`](https://www.man7.org/linux/man-pages/man2/gethostname.2.html)                           |
-/// | Windows  | [`GetHostNameW`](https://learn.microsoft.com/en-us/windows/win32/api/winsock2/nf-winsock2-gethostnamew) |
+/// | Platform     | System call                                                                                             |
+/// |--------------|---------------------------------------------------------------------------------------------------------|
+/// | UNIX         | [`gethostname`](https://www.man7.org/linux/man-pages/man2/gethostname.2.html)                           |
+/// | Windows (8+) | [`GetHostNameW`](https://learn.microsoft.com/en-us/windows/win32/api/winsock2/nf-winsock2-gethostnamew) |
 ///
 /// Note that platform-specific behavior [may change in the future][changes].
 ///

library/std/src/sys/net/hostname/mod.rs

@@ -3,7 +3,8 @@ cfg_select! {
         mod unix;
         pub use unix::hostname;
     }
-    target_os = "windows" => {
+    // `GetHostNameW` is only available starting with Windows 8.
+    all(target_os = "windows", not(target_vendor = "win7")) => {
         mod windows;
         pub use windows::hostname;
     }

library/std/src/sys/pal/windows/c.rs

@@ -237,3 +237,7 @@ cfg_select! {
     }
     _ => {}
 }
+
+// Only available starting with Windows 8.
+#[cfg(not(target_vendor = "win7"))]
+windows_targets::link!("ws2_32.dll" "system" fn GetHostNameW(name : PWSTR, namelen : i32) -> i32);

library/std/src/sys/pal/windows/c/bindings.txt

@@ -2170,7 +2170,6 @@ GetFileType
 GETFINALPATHNAMEBYHANDLE_FLAGS
 GetFinalPathNameByHandleW
 GetFullPathNameW
-GetHostNameW
 GetLastError
 GetModuleFileNameW
 GetModuleHandleA

library/std/src/sys/pal/windows/c/windows_sys.rs

@@ -49,7 +49,6 @@ windows_targets::link!("kernel32.dll" "system" fn GetFileSizeEx(hfile : HANDLE,
 windows_targets::link!("kernel32.dll" "system" fn GetFileType(hfile : HANDLE) -> FILE_TYPE);
 windows_targets::link!("kernel32.dll" "system" fn GetFinalPathNameByHandleW(hfile : HANDLE, lpszfilepath : PWSTR, cchfilepath : u32, dwflags : GETFINALPATHNAMEBYHANDLE_FLAGS) -> u32);
 windows_targets::link!("kernel32.dll" "system" fn GetFullPathNameW(lpfilename : PCWSTR, nbufferlength : u32, lpbuffer : PWSTR, lpfilepart : *mut PWSTR) -> u32);
-windows_targets::link!("ws2_32.dll" "system" fn GetHostNameW(name : PWSTR, namelen : i32) -> i32);
 windows_targets::link!("kernel32.dll" "system" fn GetLastError() -> WIN32_ERROR);
 windows_targets::link!("kernel32.dll" "system" fn GetModuleFileNameW(hmodule : HMODULE, lpfilename : PWSTR, nsize : u32) -> u32);
 windows_targets::link!("kernel32.dll" "system" fn GetModuleHandleA(lpmodulename : PCSTR) -> HMODULE);