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Fix clobber_abi and disallow SVE-related registers in Arm64EC inline assembly #131332

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@taiki-e taiki-e commented Oct 6, 2024

Currently clobber_abi in Arm64EC inline assembly is implemented using InlineAsmClobberAbi::AArch64NoX18, but broken since it attempts to clobber registers that cannot be used in Arm64EC: https://godbolt.org/z/r3PTrGz5r

error: cannot use register `x13`: x13, x14, x23, x24, x28, v16-v31 cannot be used for Arm64EC
 --> <source>:6:14
  |
6 |     asm!("", clobber_abi("C"), options(nostack, nomem, preserves_flags));
  |              ^^^^^^^^^^^^^^^^

error: cannot use register `x14`: x13, x14, x23, x24, x28, v16-v31 cannot be used for Arm64EC
 --> <source>:6:14
  |
6 |     asm!("", clobber_abi("C"), options(nostack, nomem, preserves_flags));
  |              ^^^^^^^^^^^^^^^^

<omitted the same errors for v16-v31>

Additionally, this disallows SVE-related registers per #131332 (comment).

cc @dpaoliello

r? @Amanieu

@rustbot label O-windows O-AArch64 +A-inline-assembly

@rustbot rustbot added S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. T-compiler Relevant to the compiler team, which will review and decide on the PR/issue. labels Oct 6, 2024
@rustbot rustbot added O-AArch64 Armv8-A or later processors in AArch64 mode O-windows Operating system: Windows labels Oct 6, 2024
Comment on lines 1065 to 1067
p0, p1, p2, p3, p4, p5, p6, p7,
p8, p9, p10, p11, p12, p13, p14, p15,
ffr,
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@taiki-e taiki-e Oct 6, 2024

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Given the reason why v16-v31 are blocked in this target, I suspect that SVE-related registers (z*, p*, ffr) may actually be unavailable in Arm64EC.
Although AFAIK they have not documented anything about it in https://learn.microsoft.com/en-us/windows/arm/arm64ec-abi#register-mapping-and-blocked-registers
(I don't think this question is a blocker for this PR, but I think it could be a blocker for stabilization.)

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@pmsjt can we get the docs updated to indicate if SVE-related registers (z*, p*, ffr) are available or not on ARM64EC?

Comment on lines 1065 to 1067
p0, p1, p2, p3, p4, p5, p6, p7,
p8, p9, p10, p11, p12, p13, p14, p15,
ffr,
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@pmsjt can we get the docs updated to indicate if SVE-related registers (z*, p*, ffr) are available or not on ARM64EC?

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pmsjt commented Oct 9, 2024

@dpaoliello SVE use in Windows hasn't been documented in either Arm64 classic or Arm64EC. That is coming soon and, when it does, it'll cover both.

To answer your most immediate question: No, SVE should not be used by Arm64EC code. No Arm64EC code should ever access SVE state or ISA regardless of the CPU supporting it. Just as for the presently reserved GP and Neon state in EC [1], SVE will also be reserved and not mapped to any x86-64 state.

[1] https://learn.microsoft.com/en-us/cpp/build/arm64ec-windows-abi-conventions

@taiki-e taiki-e changed the title Fix clobber_abi in Arm64EC inline assembly Fix clobber_abi and disallow preg in Arm64EC inline assembly Oct 9, 2024
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@taiki-e taiki-e marked this pull request as draft October 9, 2024 13:49
@taiki-e taiki-e changed the title Fix clobber_abi and disallow preg in Arm64EC inline assembly Fix clobber_abi and disallow SVE-related registers in Arm64EC inline assembly Oct 9, 2024
@taiki-e taiki-e force-pushed the arm64ec-clobber-abi branch 2 times, most recently from a0f78ea to 3307178 Compare October 9, 2024 14:33
@taiki-e taiki-e marked this pull request as ready for review October 9, 2024 14:34
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rustbot commented Oct 9, 2024

Some changes occurred in compiler/rustc_codegen_gcc

cc @antoyo, @GuillaumeGomez

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taiki-e commented Oct 9, 2024

@pmsjt Thanks for the clarification!

I updated PR to disallow SVE-related registers.

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@@ -0,0 +1,185 @@
use std::fmt;
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@taiki-e taiki-e Oct 9, 2024

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Unfortunately, I could not keep the approach of using the aarch64 implementation to support asm for arm64ec.

If I wanted to just reject p*/ffr, it worked with the previous file structure (955d8c6), but I couldn't figure out how to reject z0-z15, which are defined as super registers for v0-v15.
(Filter in def_regs! (like % restricted_for_arm64ec) could not be used for this purpose because it did not know what the original register name was. Also, z* could not be defined as a separate clobber-only register class because it can accept values on aarch64.)

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@taiki-e taiki-e force-pushed the arm64ec-clobber-abi branch 2 times, most recently from d380cfd to 5706a48 Compare October 9, 2024 17:40
@rustbot rustbot added the A-inline-assembly Area: Inline assembly (`asm!(…)`) label Oct 13, 2024
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A-inline-assembly Area: Inline assembly (`asm!(…)`) O-AArch64 Armv8-A or later processors in AArch64 mode O-windows Operating system: Windows S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. T-compiler Relevant to the compiler team, which will review and decide on the PR/issue.
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