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Rollup of 9 pull requests #121834

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bea6f37
Convert `Unix{Datagram,Stream}::{set_}passcred()` to per-OS traits
jmillikin Oct 25, 2023
ee61f09
Add arm64ec-pc-windows-msvc target
dpaoliello Dec 16, 2023
c0e0d13
try_with_capacity for RawVec
kornelski Jan 30, 2024
990fd60
try_with_capacity for Vec, VecDeque, String
kornelski Jan 30, 2024
196522b
Move capacity_overflow function to make ui tests change less
kornelski Jan 31, 2024
bab4cda
Add a new `wasm32-wasip1` target to rustc
alexcrichton Jan 29, 2024
a9907b1
remove Mutex::unlock
HTGAzureX1212 Feb 28, 2024
4996194
Improve error messages for generics with default parameters
veera-sivarajan Feb 21, 2024
3ba50b3
Avoid code duplication
veera-sivarajan Feb 23, 2024
cc13f82
Update item order in test
veera-sivarajan Feb 23, 2024
a7832b1
Make the success arms of `if lhs || rhs` meet up in a separate block
Zalathar Feb 28, 2024
f11713b
Error on stray .stderr/.stdout files for (un-)revisioned tests
jieyouxu Feb 22, 2024
19ee457
Remove stray stdout/stderr files
jieyouxu Feb 22, 2024
7e64163
CFI: Remove unused `typeid_for_fnsig`
rcvalle Feb 29, 2024
929b716
Rollup merge of #117156 - jmillikin:os-unix-socket-ext, r=Amanieu
workingjubilee Mar 1, 2024
b6f09ef
Rollup merge of #119199 - dpaoliello:arm64ec, r=wesleywiser
workingjubilee Mar 1, 2024
c82c112
Rollup merge of #120468 - alexcrichton:start-wasm32-wasi-rename, r=we…
workingjubilee Mar 1, 2024
a74886b
Rollup merge of #120504 - kornelski:try_with_capacity, r=Amanieu
workingjubilee Mar 1, 2024
155dc35
Rollup merge of #121416 - veera-sivarajan:bugfix-120785, r=nnethercote
workingjubilee Mar 1, 2024
129dc66
Rollup merge of #121475 - jieyouxu:tidy-stderr-check, r=the8472,compi…
workingjubilee Mar 1, 2024
cdc5d87
Rollup merge of #121736 - HTGAzureX1212:HTGAzureX1212/remove-mutex-un…
workingjubilee Mar 1, 2024
d071c06
Rollup merge of #121784 - Zalathar:if-or-converge, r=Nadrieril
workingjubilee Mar 1, 2024
0b2afee
Rollup merge of #121818 - rcvalle:rust-cfi-remove-unused-typeid-for-f…
workingjubilee Mar 1, 2024
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4 changes: 2 additions & 2 deletions Cargo.lock
Original file line number Diff line number Diff line change
Expand Up @@ -447,9 +447,9 @@ version = "0.1.0"

[[package]]
name = "cc"
version = "1.0.79"
version = "1.0.88"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "50d30906286121d95be3d479533b458f87493b30a4b5f79a607db8f5d11aa91f"
checksum = "02f341c093d19155a6e41631ce5971aac4e9a868262212153124c15fa22d1cdc"

[[package]]
name = "cfg-if"
Expand Down
1 change: 1 addition & 0 deletions compiler/rustc_codegen_llvm/src/back/archive.rs
Original file line number Diff line number Diff line change
Expand Up @@ -55,6 +55,7 @@ fn llvm_machine_type(cpu: &str) -> LLVMMachineType {
"x86_64" => LLVMMachineType::AMD64,
"x86" => LLVMMachineType::I386,
"aarch64" => LLVMMachineType::ARM64,
"arm64ec" => LLVMMachineType::ARM64EC,
"arm" => LLVMMachineType::ARM,
_ => panic!("unsupported cpu type {cpu}"),
}
Expand Down
1 change: 1 addition & 0 deletions compiler/rustc_codegen_llvm/src/llvm/ffi.rs
Original file line number Diff line number Diff line change
Expand Up @@ -56,6 +56,7 @@ pub enum LLVMMachineType {
AMD64 = 0x8664,
I386 = 0x14c,
ARM64 = 0xaa64,
ARM64EC = 0xa641,
ARM = 0x01c0,
}

Expand Down
8 changes: 7 additions & 1 deletion compiler/rustc_codegen_llvm/src/llvm_util.rs
Original file line number Diff line number Diff line change
Expand Up @@ -204,7 +204,13 @@ impl<'a> IntoIterator for LLVMFeature<'a> {
// which might lead to failures if the oldest tested / supported LLVM version
// doesn't yet support the relevant intrinsics
pub fn to_llvm_features<'a>(sess: &Session, s: &'a str) -> LLVMFeature<'a> {
let arch = if sess.target.arch == "x86_64" { "x86" } else { &*sess.target.arch };
let arch = if sess.target.arch == "x86_64" {
"x86"
} else if sess.target.arch == "arm64ec" {
"aarch64"
} else {
&*sess.target.arch
};
match (arch, s) {
("x86", "sse4.2") => {
LLVMFeature::with_dependency("sse4.2", TargetFeatureFoldStrength::EnableOnly("crc32"))
Expand Down
2 changes: 1 addition & 1 deletion compiler/rustc_codegen_llvm/src/va_arg.rs
Original file line number Diff line number Diff line change
Expand Up @@ -266,7 +266,7 @@ pub(super) fn emit_va_arg<'ll, 'tcx>(
// Generic x86
"x86" => emit_ptr_va_arg(bx, addr, target_ty, false, Align::from_bytes(4).unwrap(), true),
// Windows AArch64
"aarch64" if target.is_like_windows => {
"aarch64" | "arm64ec" if target.is_like_windows => {
emit_ptr_va_arg(bx, addr, target_ty, false, Align::from_bytes(8).unwrap(), false)
}
// macOS / iOS AArch64
Expand Down
2 changes: 1 addition & 1 deletion compiler/rustc_codegen_ssa/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ edition = "2021"
# tidy-alphabetical-start
ar_archive_writer = "0.1.5"
bitflags = "2.4.1"
cc = "1.0.69"
cc = "1.0.88"
itertools = "0.11"
jobserver = "0.1.28"
pathdiff = "0.2.0"
Expand Down
52 changes: 28 additions & 24 deletions compiler/rustc_codegen_ssa/src/back/metadata.rs
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ use std::path::Path;
use object::write::{self, StandardSegment, Symbol, SymbolSection};
use object::{
elf, pe, xcoff, Architecture, BinaryFormat, Endianness, FileFlags, Object, ObjectSection,
ObjectSymbol, SectionFlags, SectionKind, SymbolFlags, SymbolKind, SymbolScope,
ObjectSymbol, SectionFlags, SectionKind, SubArchitecture, SymbolFlags, SymbolKind, SymbolScope,
};

use rustc_data_structures::memmap::Mmap;
Expand Down Expand Up @@ -182,37 +182,40 @@ pub(crate) fn create_object_file(sess: &Session) -> Option<write::Object<'static
Endian::Little => Endianness::Little,
Endian::Big => Endianness::Big,
};
let architecture = match &sess.target.arch[..] {
"arm" => Architecture::Arm,
"aarch64" => {
let (architecture, sub_architecture) = match &sess.target.arch[..] {
"arm" => (Architecture::Arm, None),
"aarch64" => (
if sess.target.pointer_width == 32 {
Architecture::Aarch64_Ilp32
} else {
Architecture::Aarch64
}
}
"x86" => Architecture::I386,
"s390x" => Architecture::S390x,
"mips" | "mips32r6" => Architecture::Mips,
"mips64" | "mips64r6" => Architecture::Mips64,
"x86_64" => {
},
None,
),
"x86" => (Architecture::I386, None),
"s390x" => (Architecture::S390x, None),
"mips" | "mips32r6" => (Architecture::Mips, None),
"mips64" | "mips64r6" => (Architecture::Mips64, None),
"x86_64" => (
if sess.target.pointer_width == 32 {
Architecture::X86_64_X32
} else {
Architecture::X86_64
}
}
"powerpc" => Architecture::PowerPc,
"powerpc64" => Architecture::PowerPc64,
"riscv32" => Architecture::Riscv32,
"riscv64" => Architecture::Riscv64,
"sparc64" => Architecture::Sparc64,
"avr" => Architecture::Avr,
"msp430" => Architecture::Msp430,
"hexagon" => Architecture::Hexagon,
"bpf" => Architecture::Bpf,
"loongarch64" => Architecture::LoongArch64,
"csky" => Architecture::Csky,
},
None,
),
"powerpc" => (Architecture::PowerPc, None),
"powerpc64" => (Architecture::PowerPc64, None),
"riscv32" => (Architecture::Riscv32, None),
"riscv64" => (Architecture::Riscv64, None),
"sparc64" => (Architecture::Sparc64, None),
"avr" => (Architecture::Avr, None),
"msp430" => (Architecture::Msp430, None),
"hexagon" => (Architecture::Hexagon, None),
"bpf" => (Architecture::Bpf, None),
"loongarch64" => (Architecture::LoongArch64, None),
"csky" => (Architecture::Csky, None),
"arm64ec" => (Architecture::Aarch64, Some(SubArchitecture::Arm64EC)),
// Unsupported architecture.
_ => return None,
};
Expand All @@ -227,6 +230,7 @@ pub(crate) fn create_object_file(sess: &Session) -> Option<write::Object<'static
};

let mut file = write::Object::new(binary_format, architecture, endianness);
file.set_sub_architecture(sub_architecture);
if sess.target.is_like_osx {
if macho_is_arm64e(&sess.target) {
file.set_macho_cpu_subtype(object::macho::CPU_SUBTYPE_ARM64E);
Expand Down
11 changes: 6 additions & 5 deletions compiler/rustc_codegen_ssa/src/back/symbol_export.rs
Original file line number Diff line number Diff line change
Expand Up @@ -563,9 +563,10 @@ pub fn linking_symbol_name_for_instance_in_crate<'tcx>(
return undecorated;
}

let x86 = match &target.arch[..] {
"x86" => true,
"x86_64" => false,
let prefix = match &target.arch[..] {
"x86" => Some('_'),
"x86_64" => None,
"arm64ec" => Some('#'),
// Only x86/64 use symbol decorations.
_ => return undecorated,
};
Expand Down Expand Up @@ -602,8 +603,8 @@ pub fn linking_symbol_name_for_instance_in_crate<'tcx>(
Conv::X86Stdcall => ("_", "@"),
Conv::X86VectorCall => ("", "@@"),
_ => {
if x86 {
undecorated.insert(0, '_');
if let Some(prefix) = prefix {
undecorated.insert(0, prefix);
}
return undecorated;
}
Expand Down
6 changes: 5 additions & 1 deletion compiler/rustc_codegen_ssa/src/base.rs
Original file line number Diff line number Diff line change
Expand Up @@ -907,7 +907,11 @@ impl CrateInfo {
lang_items::required(tcx, l).then_some(name)
})
.collect();
let prefix = if target.is_like_windows && target.arch == "x86" { "_" } else { "" };
let prefix = match (target.is_like_windows, target.arch.as_ref()) {
(true, "x86") => "_",
(true, "arm64ec") => "#",
_ => "",
};

// This loop only adds new items to values of the hash map, so the order in which we
// iterate over the values is not important.
Expand Down
21 changes: 17 additions & 4 deletions compiler/rustc_infer/src/infer/error_reporting/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1247,10 +1247,23 @@ impl<'tcx> TypeErrCtxt<'_, 'tcx> {
(&ty::Adt(def1, sub1), &ty::Adt(def2, sub2)) => {
let did1 = def1.did();
let did2 = def2.did();
let sub_no_defaults_1 =
self.tcx.generics_of(did1).own_args_no_defaults(self.tcx, sub1);
let sub_no_defaults_2 =
self.tcx.generics_of(did2).own_args_no_defaults(self.tcx, sub2);

let generics1 = self.tcx.generics_of(did1);
let generics2 = self.tcx.generics_of(did2);

let non_default_after_default = generics1
.check_concrete_type_after_default(self.tcx, sub1)
|| generics2.check_concrete_type_after_default(self.tcx, sub2);
let sub_no_defaults_1 = if non_default_after_default {
generics1.own_args(sub1)
} else {
generics1.own_args_no_defaults(self.tcx, sub1)
};
let sub_no_defaults_2 = if non_default_after_default {
generics2.own_args(sub2)
} else {
generics2.own_args_no_defaults(self.tcx, sub2)
};
let mut values = (DiagStyledString::new(), DiagStyledString::new());
let path1 = self.tcx.def_path_str(did1);
let path2 = self.tcx.def_path_str(did2);
Expand Down
7 changes: 1 addition & 6 deletions compiler/rustc_llvm/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -8,12 +8,7 @@ edition = "2021"
libc = "0.2.73"
# tidy-alphabetical-end

# FIXME: updating cc past 1.0.79 breaks libstd bootstrapping, pin
# to the last working version here so `cargo update` doesn't cause the
# a higher version to be selected
# https://github.com/rust-lang/cc-rs/issues/913
# 1.0.{84, 85} fix this but have been yanked
[build-dependencies]
# tidy-alphabetical-start
cc = "=1.0.79"
cc = "1.0.79"
# tidy-alphabetical-end
24 changes: 24 additions & 0 deletions compiler/rustc_middle/src/ty/generics.rs
Original file line number Diff line number Diff line change
Expand Up @@ -360,6 +360,30 @@ impl<'tcx> Generics {
let own = &args[self.parent_count..][..self.params.len()];
if self.has_self && self.parent.is_none() { &own[1..] } else { own }
}

/// Returns true if a concrete type is specified after a default type.
/// For example, consider `struct T<W = usize, X = Vec<W>>(W, X)`
/// `T<usize, String>` will return true
/// `T<usize>` will return false
pub fn check_concrete_type_after_default(
&'tcx self,
tcx: TyCtxt<'tcx>,
args: &'tcx [ty::GenericArg<'tcx>],
) -> bool {
let mut default_param_seen = false;
for param in self.params.iter() {
if let Some(inst) =
param.default_value(tcx).map(|default| default.instantiate(tcx, args))
{
if inst == args[param.index as usize] {
default_param_seen = true;
} else if default_param_seen {
return true;
}
}
}
false
}
}

/// Bounds on generics.
Expand Down
10 changes: 8 additions & 2 deletions compiler/rustc_mir_build/src/build/matches/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -93,8 +93,14 @@ impl<'a, 'tcx> Builder<'a, 'tcx> {
variable_source_info,
true,
));
this.cfg.goto(lhs_success_block, variable_source_info, rhs_success_block);
rhs_success_block.unit()

// Make the LHS and RHS success arms converge to a common block.
// (We can't just make LHS goto RHS, because `rhs_success_block`
// might contain statements that we don't want on the LHS path.)
let success_block = this.cfg.start_new_block();
this.cfg.goto(lhs_success_block, variable_source_info, success_block);
this.cfg.goto(rhs_success_block, variable_source_info, success_block);
success_block.unit()
}
ExprKind::Unary { op: UnOp::Not, arg } => {
let local_scope = this.local_scope();
Expand Down
26 changes: 2 additions & 24 deletions compiler/rustc_symbol_mangling/src/typeid.rs
Original file line number Diff line number Diff line change
Expand Up @@ -4,13 +4,13 @@
/// For more information about LLVM CFI and cross-language LLVM CFI support for the Rust compiler,
/// see design document in the tracking issue #89653.
use bitflags::bitflags;
use rustc_middle::ty::{FnSig, Instance, Ty, TyCtxt};
use rustc_middle::ty::{Instance, Ty, TyCtxt};
use rustc_target::abi::call::FnAbi;
use std::hash::Hasher;
use twox_hash::XxHash64;

bitflags! {
/// Options for typeid_for_fnabi and typeid_for_fnsig.
/// Options for typeid_for_fnabi.
#[derive(Clone, Copy, Debug)]
pub struct TypeIdOptions: u32 {
const GENERALIZE_POINTERS = 1;
Expand All @@ -30,15 +30,6 @@ pub fn typeid_for_fnabi<'tcx>(
typeid_itanium_cxx_abi::typeid_for_fnabi(tcx, fn_abi, options)
}

/// Returns a type metadata identifier for the specified FnSig.
pub fn typeid_for_fnsig<'tcx>(
tcx: TyCtxt<'tcx>,
fn_sig: &FnSig<'tcx>,
options: TypeIdOptions,
) -> String {
typeid_itanium_cxx_abi::typeid_for_fnsig(tcx, fn_sig, options)
}

/// Returns a type metadata identifier for the specified Instance.
pub fn typeid_for_instance<'tcx>(
tcx: TyCtxt<'tcx>,
Expand All @@ -61,19 +52,6 @@ pub fn kcfi_typeid_for_fnabi<'tcx>(
hash.finish() as u32
}

/// Returns a KCFI type metadata identifier for the specified FnSig.
pub fn kcfi_typeid_for_fnsig<'tcx>(
tcx: TyCtxt<'tcx>,
fn_sig: &FnSig<'tcx>,
options: TypeIdOptions,
) -> u32 {
// A KCFI type metadata identifier is a 32-bit constant produced by taking the lower half of the
// xxHash64 of the type metadata identifier. (See llvm/llvm-project@cff5bef.)
let mut hash: XxHash64 = Default::default();
hash.write(typeid_itanium_cxx_abi::typeid_for_fnsig(tcx, fn_sig, options).as_bytes());
hash.finish() as u32
}

/// Returns a KCFI type metadata identifier for the specified Instance.
pub fn kcfi_typeid_for_instance<'tcx>(
tcx: TyCtxt<'tcx>,
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -1072,41 +1072,6 @@ pub fn typeid_for_fnabi<'tcx>(
typeid
}

/// Returns a type metadata identifier for the specified FnSig using the Itanium C++ ABI with vendor
/// extended type qualifiers and types for Rust types that are not used at the FFI boundary.
pub fn typeid_for_fnsig<'tcx>(
tcx: TyCtxt<'tcx>,
fn_sig: &FnSig<'tcx>,
options: TypeIdOptions,
) -> String {
// A name is mangled by prefixing "_Z" to an encoding of its name, and in the case of functions
// its type.
let mut typeid = String::from("_Z");

// Clang uses the Itanium C++ ABI's virtual tables and RTTI typeinfo structure name as type
// metadata identifiers for function pointers. The typeinfo name encoding is a two-character
// code (i.e., 'TS') prefixed to the type encoding for the function.
typeid.push_str("TS");

// A dictionary of substitution candidates used for compression (see
// https://itanium-cxx-abi.github.io/cxx-abi/abi.html#mangling-compression).
let mut dict: FxHashMap<DictKey<'tcx>, usize> = FxHashMap::default();

// Encode the function signature
typeid.push_str(&encode_fnsig(tcx, fn_sig, &mut dict, options));

// Add encoding suffixes
if options.contains(EncodeTyOptions::NORMALIZE_INTEGERS) {
typeid.push_str(".normalized");
}

if options.contains(EncodeTyOptions::GENERALIZE_POINTERS) {
typeid.push_str(".generalized");
}

typeid
}

/// Returns a type metadata identifier for the specified Instance using the Itanium C++ ABI with
/// vendor extended type qualifiers and types for Rust types that are not used at the FFI boundary.
pub fn typeid_for_instance<'tcx>(
Expand Down
2 changes: 1 addition & 1 deletion compiler/rustc_target/src/abi/call/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -814,7 +814,7 @@ impl<'a, Ty> FnAbi<'a, Ty> {
}
}
},
"aarch64" => {
"aarch64" | "arm64ec" => {
let kind = if cx.target_spec().is_like_osx {
aarch64::AbiKind::DarwinPCS
} else if cx.target_spec().is_like_windows {
Expand Down
2 changes: 2 additions & 0 deletions compiler/rustc_target/src/spec/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1562,6 +1562,7 @@ supported_targets! {

("aarch64-pc-windows-msvc", aarch64_pc_windows_msvc),
("aarch64-uwp-windows-msvc", aarch64_uwp_windows_msvc),
("arm64ec-pc-windows-msvc", arm64ec_pc_windows_msvc),
("x86_64-pc-windows-msvc", x86_64_pc_windows_msvc),
("x86_64-uwp-windows-msvc", x86_64_uwp_windows_msvc),
("x86_64-win7-windows-msvc", x86_64_win7_windows_msvc),
Expand All @@ -1575,6 +1576,7 @@ supported_targets! {
("wasm32-unknown-emscripten", wasm32_unknown_emscripten),
("wasm32-unknown-unknown", wasm32_unknown_unknown),
("wasm32-wasi", wasm32_wasi),
("wasm32-wasip1", wasm32_wasip1),
("wasm32-wasip2", wasm32_wasip2),
("wasm32-wasi-preview1-threads", wasm32_wasi_preview1_threads),
("wasm64-unknown-unknown", wasm64_unknown_unknown),
Expand Down
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