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Implement checked Shl/Shr at MIR building. #108282
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r? @jackh726 (rustbot has picked a reviewer for you, use r? to override) |
Some changes occurred in compiler/rustc_codegen_cranelift cc @bjorn3 |
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What is the difference? |
Can you also update the docs for CheckedBinaryOp: rust/compiler/rustc_middle/src/mir/syntax.rs Lines 1115 to 1117 in 3200982
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This PR changes MIR cc @oli-obk, @RalfJung, @JakobDegen, @davidtwco, @celinval, @vakaras |
@bors try @rust-timer queue |
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⌛ Trying commit c0defbb19ecd3c083941ba2f7d7c050d83c0fa54 with merge b7075a68bbabaad51613d13371e9b12fc9da1d3b... |
☀️ Try build successful - checks-actions |
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Finished benchmarking commit (b7075a68bbabaad51613d13371e9b12fc9da1d3b): comparison URL. Overall result: ❌✅ regressions and improvements - no action neededBenchmarking this pull request likely means that it is perf-sensitive, so we're automatically marking it as not fit for rolling up. While you can manually mark this PR as fit for rollup, we strongly recommend not doing so since this PR may lead to changes in compiler perf. @bors rollup=never Instruction countThis is a highly reliable metric that was used to determine the overall result at the top of this comment.
Max RSS (memory usage)ResultsThis is a less reliable metric that may be of interest but was not used to determine the overall result at the top of this comment.
CyclesResultsThis is a less reliable metric that may be of interest but was not used to determine the overall result at the top of this comment.
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Does this mean |
I don't think so.
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let (int, signed) = match *self.kind() { | ||
ty::Int(ity) => (Integer::from_int_ty(&tcx, ity), true), | ||
ty::Uint(uty) => (Integer::from_uint_ty(&tcx, uty), false), | ||
_ => bug!("non integer discriminant"), |
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nit: update the error message
@bors r+ |
⌛ Testing commit 0422f44 with merge d529528cedcad258a0e595aa0da70888b7d05bfc... |
💥 Test timed out |
@bors retry |
☀️ Test successful - checks-actions |
Finished benchmarking commit (c90eb48): comparison URL. Overall result: ❌✅ regressions and improvements - ACTION NEEDEDNext Steps: If you can justify the regressions found in this perf run, please indicate this with @rustbot label: +perf-regression Instruction countThis is a highly reliable metric that was used to determine the overall result at the top of this comment.
Max RSS (memory usage)ResultsThis is a less reliable metric that may be of interest but was not used to determine the overall result at the top of this comment.
CyclesThis benchmark run did not return any relevant results for this metric. |
The @rustbot label: +perf-regression-triaged |
Implement checked Shl/Shr at MIR building. This does not require any special handling by codegen backends, as the overflow behaviour is entirely determined by the rhs (shift amount). This allows MIR ConstProp to remove the overflow check for constant shifts. ~There is an existing different behaviour between cg_llvm and cg_clif (cc `@bjorn3).` I took cg_llvm's one as reference: overflow if `rhs < 0 || rhs > number_of_bits_in_lhs_ty`.~ EDIT: `cg_llvm` and `cg_clif` implement the overflow check differently. This PR uses `cg_llvm`'s implementation based on a `BitAnd` instead of `cg_clif`'s one based on an unsigned comparison.
Remove CBMC failure expectations that are now caught by the rust overflow check. This was due to the following Rust compiler change: - rust-lang/rust#108282
This does not require any special handling by codegen backends,
as the overflow behaviour is entirely determined by the rhs (shift amount).
This allows MIR ConstProp to remove the overflow check for constant shifts.
There is an existing different behaviour between cg_llvm and cg_clif (cc @bjorn3).I took cg_llvm's one as reference: overflow if
rhs < 0 || rhs > number_of_bits_in_lhs_ty
.EDIT:
cg_llvm
andcg_clif
implement the overflow check differently. This PR usescg_llvm
's implementation based on aBitAnd
instead ofcg_clif
's one based on an unsigned comparison.