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Rollup merge of #126983 - tgross35:f16-f128-smir, r=celinval
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Remove `f16` and `f128` ICE paths from smir

Just chasing down some possible ICE paths. ```@compiler-errors``` mentioned in #121728 (comment) that it is okay not to support these in smir, but this change seems pretty trivial?

r? ```@celinval``` since you reviewed #114607 (review)
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jhpratt authored Jun 27, 2024
2 parents 8905be5 + 518b74e commit 73016dc
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Showing 3 changed files with 6 additions and 2 deletions.
2 changes: 2 additions & 0 deletions compiler/rustc_smir/src/rustc_internal/internal.rs
Original file line number Diff line number Diff line change
Expand Up @@ -188,8 +188,10 @@ impl RustcInternal for FloatTy {

fn internal<'tcx>(&self, _tables: &mut Tables<'_>, _tcx: TyCtxt<'tcx>) -> Self::T<'tcx> {
match self {
FloatTy::F16 => rustc_ty::FloatTy::F16,
FloatTy::F32 => rustc_ty::FloatTy::F32,
FloatTy::F64 => rustc_ty::FloatTy::F64,
FloatTy::F128 => rustc_ty::FloatTy::F128,
}
}
}
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4 changes: 2 additions & 2 deletions compiler/rustc_smir/src/rustc_smir/convert/ty.rs
Original file line number Diff line number Diff line change
Expand Up @@ -304,10 +304,10 @@ impl<'tcx> Stable<'tcx> for ty::FloatTy {

fn stable(&self, _: &mut Tables<'_>) -> Self::T {
match self {
ty::FloatTy::F16 => unimplemented!("f16_f128"),
ty::FloatTy::F16 => FloatTy::F16,
ty::FloatTy::F32 => FloatTy::F32,
ty::FloatTy::F64 => FloatTy::F64,
ty::FloatTy::F128 => unimplemented!("f16_f128"),
ty::FloatTy::F128 => FloatTy::F128,
}
}
}
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2 changes: 2 additions & 0 deletions compiler/stable_mir/src/ty.rs
Original file line number Diff line number Diff line change
Expand Up @@ -608,8 +608,10 @@ impl UintTy {

#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum FloatTy {
F16,
F32,
F64,
F128,
}

#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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