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Rollup merge of #70345 - nnethercote:rm-no_integrated_as, r=alexcrichton
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Remove `no_integrated_as` mode.

Specifically, remove both `-Z no_integrated_as` and
`TargetOptions::no_integrated_as`. The latter was only used for the
`msp430_none_elf` platform, for which it's no longer required.

r? @alexcrichton
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Centril authored Mar 27, 2020
2 parents 7520894 + 02840ca commit 08e867c
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Showing 8 changed files with 26 additions and 129 deletions.
63 changes: 25 additions & 38 deletions src/librustc_codegen_llvm/back/write.rs
Original file line number Diff line number Diff line change
Expand Up @@ -16,9 +16,7 @@ use crate::ModuleLlvm;
use log::debug;
use rustc::bug;
use rustc::ty::TyCtxt;
use rustc_codegen_ssa::back::write::{
run_assembler, BitcodeSection, CodegenContext, EmitObj, ModuleConfig,
};
use rustc_codegen_ssa::back::write::{BitcodeSection, CodegenContext, EmitObj, ModuleConfig};
use rustc_codegen_ssa::traits::*;
use rustc_codegen_ssa::{CompiledModule, ModuleCodegen, RLIB_BYTECODE_EXTENSION};
use rustc_data_structures::small_c_str::SmallCStr;
Expand Down Expand Up @@ -734,53 +732,41 @@ pub(crate) unsafe fn codegen(
})?;
}

let config_emit_object_code = matches!(config.emit_obj, EmitObj::ObjectCode(_));

if config.emit_asm || (config_emit_object_code && config.no_integrated_as) {
if config.emit_asm {
let _timer = cgcx
.prof
.generic_activity_with_arg("LLVM_module_codegen_emit_asm", &module.name[..]);
let path = cgcx.output_filenames.temp_path(OutputType::Assembly, module_name);

// We can't use the same module for asm and binary output, because that triggers
// various errors like invalid IR or broken binaries, so we might have to clone the
// module to produce the asm output
let llmod = if config_emit_object_code { llvm::LLVMCloneModule(llmod) } else { llmod };
// We can't use the same module for asm and object code output,
// because that triggers various errors like invalid IR or broken
// binaries. So we must clone the module to produce the asm output
// if we are also producing object code.
let llmod = if let EmitObj::ObjectCode(_) = config.emit_obj {
llvm::LLVMCloneModule(llmod)
} else {
llmod
};
with_codegen(tm, llmod, config.no_builtins, |cpm| {
write_output_file(diag_handler, tm, cpm, llmod, &path, llvm::FileType::AssemblyFile)
})?;
}

match config.emit_obj {
EmitObj::ObjectCode(_) => {
if !config.no_integrated_as {
let _timer = cgcx.prof.generic_activity_with_arg(
"LLVM_module_codegen_emit_obj",
&module.name[..],
);
with_codegen(tm, llmod, config.no_builtins, |cpm| {
write_output_file(
diag_handler,
tm,
cpm,
llmod,
&obj_out,
llvm::FileType::ObjectFile,
)
})?;
} else {
let _timer = cgcx.prof.generic_activity_with_arg(
"LLVM_module_codegen_asm_to_obj",
&module.name[..],
);
let assembly =
cgcx.output_filenames.temp_path(OutputType::Assembly, module_name);
run_assembler(cgcx, diag_handler, &assembly, &obj_out);

if !config.emit_asm && !cgcx.save_temps {
drop(fs::remove_file(&assembly));
}
}
let _timer = cgcx
.prof
.generic_activity_with_arg("LLVM_module_codegen_emit_obj", &module.name[..]);
with_codegen(tm, llmod, config.no_builtins, |cpm| {
write_output_file(
diag_handler,
tm,
cpm,
llmod,
&obj_out,
llvm::FileType::ObjectFile,
)
})?;
}

EmitObj::Bitcode => {
Expand All @@ -802,6 +788,7 @@ pub(crate) unsafe fn codegen(

drop(handlers);
}

Ok(module.into_compiled_module(
config.emit_obj != EmitObj::None,
config.emit_bc,
Expand Down
66 changes: 1 addition & 65 deletions src/librustc_codegen_ssa/back/write.rs
Original file line number Diff line number Diff line change
@@ -1,5 +1,4 @@
use super::command::Command;
use super::link::{self, get_linker, remove};
use super::link::{self, remove};
use super::linker::LinkerInfo;
use super::lto::{self, SerializedModule};
use super::symbol_export::symbol_name_for_instance_in_crate;
Expand Down Expand Up @@ -116,7 +115,6 @@ pub struct ModuleConfig {
pub merge_functions: bool,
pub inline_threshold: Option<usize>,
pub new_llvm_pass_manager: Option<bool>,
pub no_integrated_as: bool,
}

impl ModuleConfig {
Expand All @@ -140,7 +138,6 @@ impl ModuleConfig {
emit_ir: false,
emit_asm: false,
emit_obj: EmitObj::None,
no_integrated_as: false,

verify_llvm_ir: false,
no_prepopulate_passes: false,
Expand Down Expand Up @@ -202,12 +199,6 @@ impl ModuleConfig {
}
}

/// Assembler name and command used by codegen when no_integrated_as is enabled
pub struct AssemblerCommand {
name: PathBuf,
cmd: Command,
}

// HACK(eddyb) work around `#[derive]` producing wrong bounds for `Clone`.
pub struct TargetMachineFactory<B: WriteBackendMethods>(
pub Arc<dyn Fn() -> Result<B::TargetMachine, String> + Send + Sync>,
Expand Down Expand Up @@ -260,8 +251,6 @@ pub struct CodegenContext<B: WriteBackendMethods> {
pub cgu_reuse_tracker: CguReuseTracker,
// Channel back to the main control thread to send messages to
pub coordinator_send: Sender<Box<dyn Any + Send>>,
// The assembler command if no_integrated_as option is enabled, None otherwise
pub assembler_cmd: Option<Arc<AssemblerCommand>>,
}

impl<B: WriteBackendMethods> CodegenContext<B> {
Expand Down Expand Up @@ -415,9 +404,6 @@ pub fn start_async_codegen<B: ExtraBackendMethods>(

modules_config.emit_pre_lto_bc = need_pre_lto_bitcode_for_incr_comp(sess);

modules_config.no_integrated_as =
tcx.sess.opts.cg.no_integrated_as || tcx.sess.target.target.options.no_integrated_as;

for output_type in sess.opts.output_types.keys() {
match *output_type {
OutputType::Bitcode => {
Expand Down Expand Up @@ -1030,17 +1016,6 @@ fn start_executing_work<B: ExtraBackendMethods>(
each_linked_rlib_for_lto.push((cnum, path.to_path_buf()));
}));

let assembler_cmd = if modules_config.no_integrated_as {
// HACK: currently we use linker (gcc) as our assembler
let (linker, flavor) = link::linker_and_flavor(sess);

let (name, mut cmd) = get_linker(sess, &linker, flavor);
cmd.args(&sess.target.target.options.asm_args);
Some(Arc::new(AssemblerCommand { name, cmd }))
} else {
None
};

let ol = if tcx.sess.opts.debugging_opts.no_codegen
|| !tcx.sess.opts.output_types.should_codegen()
{
Expand Down Expand Up @@ -1076,7 +1051,6 @@ fn start_executing_work<B: ExtraBackendMethods>(
target_pointer_width: tcx.sess.target.target.target_pointer_width.clone(),
target_arch: tcx.sess.target.target.arch.clone(),
debuginfo: tcx.sess.opts.debuginfo,
assembler_cmd,
};

// This is the "main loop" of parallel work happening for parallel codegen.
Expand Down Expand Up @@ -1610,44 +1584,6 @@ fn spawn_work<B: ExtraBackendMethods>(cgcx: CodegenContext<B>, work: WorkItem<B>
});
}

pub fn run_assembler<B: ExtraBackendMethods>(
cgcx: &CodegenContext<B>,
handler: &Handler,
assembly: &Path,
object: &Path,
) {
let assembler = cgcx.assembler_cmd.as_ref().expect("cgcx.assembler_cmd is missing?");

let pname = &assembler.name;
let mut cmd = assembler.cmd.clone();
cmd.arg("-c").arg("-o").arg(object).arg(assembly);
debug!("{:?}", cmd);

match cmd.output() {
Ok(prog) => {
if !prog.status.success() {
let mut note = prog.stderr.clone();
note.extend_from_slice(&prog.stdout);

handler
.struct_err(&format!(
"linking with `{}` failed: {}",
pname.display(),
prog.status
))
.note(&format!("{:?}", &cmd))
.note(str::from_utf8(&note[..]).unwrap())
.emit();
handler.abort_if_errors();
}
}
Err(e) => {
handler.err(&format!("could not exec the linker `{}`: {}", pname.display(), e));
handler.abort_if_errors();
}
}
}

enum SharedEmitterMessage {
Diagnostic(Diagnostic),
InlineAsmError(u32, String),
Expand Down
4 changes: 0 additions & 4 deletions src/librustc_interface/tests.rs
Original file line number Diff line number Diff line change
Expand Up @@ -451,10 +451,6 @@ fn test_codegen_options_tracking_hash() {
opts.cg.prefer_dynamic = true;
assert!(reference.dep_tracking_hash() != opts.dep_tracking_hash());

opts = reference.clone();
opts.cg.no_integrated_as = true;
assert!(reference.dep_tracking_hash() != opts.dep_tracking_hash());

opts = reference.clone();
opts.cg.no_redzone = Some(true);
assert!(reference.dep_tracking_hash() != opts.dep_tracking_hash());
Expand Down
2 changes: 0 additions & 2 deletions src/librustc_session/options.rs
Original file line number Diff line number Diff line change
Expand Up @@ -665,8 +665,6 @@ options! {CodegenOptions, CodegenSetter, basic_codegen_options,
"use soft float ABI (*eabihf targets only)"),
prefer_dynamic: bool = (false, parse_bool, [TRACKED],
"prefer dynamic linking to static linking"),
no_integrated_as: bool = (false, parse_bool, [TRACKED],
"use an external assembler rather than LLVM's integrated one"),
no_redzone: Option<bool> = (None, parse_opt_bool, [TRACKED],
"disable the use of the redzone"),
relocation_model: Option<String> = (None, parse_opt_string, [TRACKED],
Expand Down
8 changes: 0 additions & 8 deletions src/librustc_target/spec/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -712,11 +712,6 @@ pub struct TargetOptions {
// will 'just work'.
pub obj_is_bitcode: bool,

// LLVM can't produce object files for this target. Instead, we'll make LLVM
// emit assembly and then use `gcc` to turn that assembly into an object
// file
pub no_integrated_as: bool,

/// Don't use this field; instead use the `.min_atomic_width()` method.
pub min_atomic_width: Option<u64>,

Expand Down Expand Up @@ -872,7 +867,6 @@ impl Default for TargetOptions {
allow_asm: true,
has_elf_tls: false,
obj_is_bitcode: false,
no_integrated_as: false,
min_atomic_width: None,
max_atomic_width: None,
atomic_cas: true,
Expand Down Expand Up @@ -1187,7 +1181,6 @@ impl Target {
key!(main_needs_argc_argv, bool);
key!(has_elf_tls, bool);
key!(obj_is_bitcode, bool);
key!(no_integrated_as, bool);
key!(max_atomic_width, Option<u64>);
key!(min_atomic_width, Option<u64>);
key!(atomic_cas, bool);
Expand Down Expand Up @@ -1415,7 +1408,6 @@ impl ToJson for Target {
target_option_val!(main_needs_argc_argv);
target_option_val!(has_elf_tls);
target_option_val!(obj_is_bitcode);
target_option_val!(no_integrated_as);
target_option_val!(min_atomic_width);
target_option_val!(max_atomic_width);
target_option_val!(atomic_cas);
Expand Down
1 change: 0 additions & 1 deletion src/librustc_target/spec/msp430_none_elf.rs
Original file line number Diff line number Diff line change
Expand Up @@ -22,7 +22,6 @@ pub fn target() -> TargetResult {
// dependency on this specific gcc.
asm_args: vec!["-mcpu=msp430".to_string()],
linker: Some("msp430-elf-gcc".to_string()),
no_integrated_as: true,

// There are no atomic CAS instructions available in the MSP430
// instruction set, and the LLVM backend doesn't currently support
Expand Down
8 changes: 0 additions & 8 deletions src/test/run-make-fulldeps/no-integrated-as/Makefile

This file was deleted.

3 changes: 0 additions & 3 deletions src/test/run-make-fulldeps/no-integrated-as/hello.rs

This file was deleted.

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