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SCB.ICSR.VECTACTIVE is 9 bits, not 8 #373

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Dec 31, 2021
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SCB.ICSR.VECTACTIVE is 9 bits, not 8 #373

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a2d8f6d
`SCB.ICSR.VECTACTIVE` is 9 bits, not 8
TDHolmes Dec 17, 2021
8ef3eb9
changelog entry
TDHolmes Dec 31, 2021
ccdc7cc
clippy cleanup
TDHolmes Dec 31, 2021
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4 changes: 4 additions & 0 deletions CHANGELOG.md
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Original file line number Diff line number Diff line change
Expand Up @@ -18,6 +18,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
There is a feature `cm7` to enable access to these.
- Added `delay::Delay::with_source`, a constructor that lets you specify
the SysTick clock source (#374).
- Added the capability for `DWT` to do cycle count comparison (#367).
- Updated `SCB.ICSR.VECTACTIVE`/`SCB::vect_active()` to be 9 bits instead of 8.
Also fixes `VectActive::from` to take a `u16` and subtract `16` for
`VectActive::Interrupt`s to match `SBC::vect_active()` (#373).

### Deprecated

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15 changes: 8 additions & 7 deletions src/peripheral/scb.rs
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Expand Up @@ -170,9 +170,10 @@ impl SCB {
/// Returns the active exception number
#[inline]
pub fn vect_active() -> VectActive {
let icsr = unsafe { ptr::read(&(*SCB::ptr()).icsr as *const _ as *const u32) };
let icsr =
unsafe { ptr::read_volatile(&(*SCB::ptr()).icsr as *const _ as *const u32) } & 0x1FF;
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changed to read_volatile like cortex-m-rt did to prevent optimizations here


match icsr as u8 {
match icsr as u16 {
0 => VectActive::ThreadMode,
2 => VectActive::Exception(Exception::NonMaskableInt),
3 => VectActive::Exception(Exception::HardFault),
Expand Down Expand Up @@ -274,15 +275,15 @@ pub enum VectActive {

/// Device specific exception (external interrupts)
Interrupt {
/// Interrupt number. This number is always within half open range `[0, 240)`
irqn: u8,
/// Interrupt number. This number is always within half open range `[0, 512)` (9 bit)
irqn: u16,
},
}

impl VectActive {
/// Converts a `byte` into `VectActive`
/// Converts a vector number into `VectActive`
#[inline]
pub fn from(vect_active: u8) -> Option<Self> {
pub fn from(vect_active: u16) -> Option<Self> {
Some(match vect_active {
0 => VectActive::ThreadMode,
2 => VectActive::Exception(Exception::NonMaskableInt),
Expand All @@ -300,7 +301,7 @@ impl VectActive {
12 => VectActive::Exception(Exception::DebugMonitor),
14 => VectActive::Exception(Exception::PendSV),
15 => VectActive::Exception(Exception::SysTick),
irqn if irqn >= 16 => VectActive::Interrupt { irqn },
irqn if (16..512).contains(&irqn) => VectActive::Interrupt { irqn: irqn - 16 },
_ => return None,
})
}
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