[AMD] Enable amd pr ci - #2347
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Co-authored-by: Xinyu Jiang <xinyuj2@andrew.cmu.edu>
Co-authored-by: Xinyu Jiang <xinyuj2@andrew.cmu.edu>
Co-authored-by: Xinyu Jiang <xinyuj2@andrew.cmu.edu>
Co-authored-by: Xinyu Jiang <xinyuj2@andrew.cmu.edu>
…ri a2a backend Co-authored-by: Xinyu Jiang <xinyuj2@andrew.cmu.edu>
Co-authored-by: Xinyu Jiang <xinyuj2@andrew.cmu.edu>
Co-authored-by: Xinyu Jiang <xinyuj2@andrew.cmu.edu>
Co-authored-by: Yuankai Chen <206619631+yuankaichen-amd@users.noreply.github.com> Co-authored-by: Xinyu Kang <93342727+Xinyu-Kang@users.noreply.github.com> Co-authored-by: Shekhar <38083203+indianspeedster@users.noreply.github.com> Co-authored-by: Sree Rohith Pulipaka <119916571+sreerohi@users.noreply.github.com> Co-authored-by: lizamd <161388580+lizamd@users.noreply.github.com>
Co-authored-by: Xinyu Jiang <xinyuj2@andrew.cmu.edu>
Assign shared rollout IDs only when session v2 returns multiple leaves, so singleton outputs keep the same identity semantics as v1 while compact siblings still fail closed without a grouping identity. Run ROCm jobs with the explicit hardware selector and refresh the dated image to one containing the repository's pinned Transformers version.
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This was referenced Aug 13, 2026
Co-authored-by: Zhiyao Jiang <jessicajiang324@gmail.com>
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| samples = result.samples | ||
| if use_v2: | ||
| if use_v2 and len(samples) > 1: |
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This shouldn't be modified like this. Tom has a follow-up PR fix this.
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Co-author-with: @XinyuJiangCMU, @yuankaichen-amd, @Xinyu-Kang, @indianspeedster, @sreerohi, @lizamd
Summary
Bring up the ROCm CI lane on MI300X/MI355X and enable the cases, without changing shared NVIDIA behavior. ROCm-specific recipes live under
scripts/amd/. Tests select them throughMILES_PLATFORM=rocm, while smaller ROCm-only differences are passed through backend-neutralextra_args/extra_env_vars.Test status
test_amd_mtp1_spec_v2_r3test_inkling_small_4layer_citest_qwen3_4B_offload_disk_streamtest_deepseek_v4_flash_4layer_citest_qwen3_4B_fsdp_hybrid_shard_r2s2test_amd_moriep_fp8_bridgetest_glm5_2_744b_a40b_5layer_citest_glm47_flash/test_amd_r3_mtpHow AMD coverage is added
ROCm-specific behavior is selected through
MILES_PLATFORM=rocm, set bydocker/Dockerfile.rocm. Shared NVIDIA paths do not contain ROCm-specific branches.There are three patterns:
1. Different recipe → use
scripts/amd/If ROCm needs a different recipe, the test dispatches to an AMD-specific script:
2. Same recipe, extra flags → use
CaseConfigIf ROCm only needs extra arguments or environment variables, pass them through backend-neutral fields:
3. AMD-only case → keep it in the AMD test
If the case only exists on ROCm, keep its configuration entirely in the AMD test.