Make NetAssigns take any lvalue as the target. #3
Description
signal f_sel : std_logic_vector(1 downto 0);
f_sel(0) <= expr0;
f_sel(1) <= expr1;
{{ message }}
signal f_sel : std_logic_vector(1 downto 0);
f_sel(0) <= expr0;
f_sel(1) <= expr1;