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8359378: aarch64: crash when using -XX:+UseFPUForSpilling #27350
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👋 Welcome back bulasevich! A progress list of the required criteria for merging this PR into |
❗ This change is not yet ready to be integrated. |
@bulasevich The following label will be automatically applied to this pull request:
When this pull request is ready to be reviewed, an "RFR" email will be sent to the corresponding mailing list. If you would like to change these labels, use the /label pull request command. |
Hi @bulasevich, thanks for working on this issue, but please note that it was already assigned to me (JDK-8359378). I am fine with re-assigning it to you, but next time please ask first, to avoid work duplication. |
/cc hotspot-compiler |
@robcasloz |
Right, @robcasloz, |
Given that you're looking at this, I'd appreciate it if you could form an opinion bout whether this option is of any use.
|
@theRealAph Andrew, I agree with you. From my experience it is useless on Cortex-A72, Neoverse N1, Neoverse V1. I have now also checked on Neoverse V2 and Apple M4 - in both cases UseFPUForSpilling shows a clear performance degradation. |
Thanks, I had planned to look at this in the upcoming weeks but did not start yet. I just reassigned the issue to you, will have a look at your fix within the next days. |
I was wondering about that. So, perhaps a better fix is to change the command line ergonomics so that AArch64 either 1) refuses to run with it set to true or 2) prints a warning and resets it to false. |
I suggest handling this in two steps:
diff --git a/src/hotspot/cpu/aarch64/vm_version_aarch64.cpp b/src/hotspot/cpu/aarch64/vm_version_aarch64.cpp
index 308deeaf5e2..7702988c11c 100644
--- a/src/hotspot/cpu/aarch64/vm_version_aarch64.cpp
+++ b/src/hotspot/cpu/aarch64/vm_version_aarch64.cpp
@@ -621,4 +621,9 @@ void VM_Version::initialize() {
FLAG_SET_DEFAULT(UseVectorizedHashCodeIntrinsic, true);
}
+
+ if (UseFPUForSpilling) {
+ warning("UseFPUForSpilling is known to degrade performance on this platform and will be ignored.");
+ FLAG_SET_DEFAULT(UseFPUForSpilling, false);
+ }
#endif
|
AArch64 BarrierSetAssembler path assumes only FP/vector ideal regs reach the FP spill/restore encoding. With -XX:+UseFPUForSpilling Register Allocator may allocate scalar values in FP registers. When such values (Op_RegI/Op_RegN/Op_RegL/Op_RegP) hit
BarrierSetAssembler::encode_float_vector_register_size
, we trip ShouldNotReachHere in release build and "unexpected ideal register" assertion in debug build.Fix: teach the encoder to handle scalar ideal regs when they physically live in FP regs:
Related:
Testing: tier1-3 with javaoptions -Xcomp -Xbatch -XX:+UseFPUForSpilling on AARCH
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