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Floating point multipication issue in RISCV cva6 #1416
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Thanks for this issue @spidugu444. I have assigned it to @JeanRochCoulon, the verification lead for the CVA6. As far as I know, the CVA6 team is not planning to support floating point operations in the initial release of CVA6, so this bug may not be a priority. FYI, the floating point IP that is used by the CVA6 (and CV32E40P), known as The first user of cvfpu will be the v2.0.0 release of CV32E40P. It is my expectation that the CVA6 team will integrate the fully verified |
Thank for this feedback. |
@JeanRochCoulon fmul test is failed on VCS also, currently I am using verilator-4.110 version. |
I have opened CVFPU issue 63 for this issue. Please track debug of this problem in that issue. |
ISACOV: Fix issue openhwgroup#1414
Hi All,
In CVA6 riscv-arch-test suite fmul tests are failing due to incorrect calculation as shown in below attached screenshot.
As shown in above in line 157 and 182 expected result is 0,as it is multiplied with zero but in verilator it is giving value as 80000000 where as in spike it is calculating correct result as 0.
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