assembler .option directives for Zc*

[silabs-hfegran]

For the compressed instructions we have the .option rvc and .option norvc assembler directives, however
with the introduction of Zc*, these are no longer usable and the current situation is as follows:

• .option rvc :
  • Not allowed in combination with Zc*, flagged as error
  • No way to prevent Zc* in certain sections of code
• .option norvc :
  • No error message
  • Does this actually disallow Zca? Zc*?

The behavior for these options with Zc should either be clearly defined, and apply to the previous C-instructions; or should have its own options defined.

Some possible solutions:

1. .option rvc/norvc: Applies to all Zc* instructions
2. .option rvc/norvc: Applies to all Zc instructions (in effect, identical to previous C-behavior)
3. .option rvzc/norvzc: Same as option 1, but renamed
4. .option rvzc*/norvzc*: Specific options for each sub-extension, would there actually be a need for this?
5. .option rvzc/norvzc + option rvzc*/norvzc*: Both "catch-all" option and specific sub-extension option

[linsinan1995]

I'd expect that .option rvc disables instructions from zcm* extension (rv32gc_zca_zcb is legal and equals rv32gc) globally since these extensions occupy encoding spaces of compressed fp instructions. As for .option norvc, it is expected to disable all zc* instructions as well, since zca is the subset of C and is required by all zc* ext.

You right. There is no precise option control for zc* extension, and I recommend you propose this idea to Spec people if it is necessary.

[silabs-hfegran]

I'd expect that .option rvc disables instructions from zcm* extension (rv32gc_zca_zcb is legal and equals rv32gc) globally since these extensions occupy encoding spaces of compressed fp instructions. As for .option norvc, it is expected to disable all zc* instructions as well, since zca is the subset of C and is required by all zc* ext.

Thank you for the response - I was a bit imprecise in stating that option rvc Zc* always gets flagged as an error. The specific reason why I reported this was due to riscv-dv generated assembly code that uses .option rvc/norvc to allow/disallow compressed instructions in certain sections. With our gcc flags, rv32im_zca_zcb_zcmt_zcmp_<...> we got the error stating that option rvc is not legal, and furthermore, the combination of these zc*-extensions and rv32imc is not legal as well, so that left us with no way of explicitly re-enabling zc-instructions after their disablement (Except for pushing/popping options)

[linsinan1995]

I just notice a PR from rv-asm-manual for push-arch/pop-arch support, and it could help handle this use case.

[jeremybennett]

The .option directive as per the Kito Cheng PR referenced by @linsinan1995 (which is now merged) should solve this. I have not checked how well this is currently supported in the GNU assembler. The next release of the tool chain will include the latest version of binutils, so anything that has been ported to support .option will be there.

[NandniJamnadas]

Hi @silabs-hfegran, I will test out Kito Cheng's PR before I close this issue. If you are having any issues with the PR, let us know.

[NandniJamnadas]

This issue has been fixed by the patch #86. However, it was missed out during the rebase so instead pushed under this commit: 831fd151bd4143f136562182e13bfded45cd0d48.

[NandniJamnadas]

@silabs-hfegran This issue has been fixed and now merged into corev-binutils-gdb. If you are having issues, please let us know.

[silabs-hfegran]

Thank you for the updates @NandniJamnadas