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26 changes: 26 additions & 0 deletions acvm-repo/acir/src/circuit/brillig.rs
Original file line number Diff line number Diff line change
Expand Up @@ -41,6 +41,19 @@ pub enum BrilligInputs<F> {
MemoryArray(BlockId),
}

impl<F: std::fmt::Display> std::fmt::Display for BrilligInputs<F> {
fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
match self {
BrilligInputs::Single(expr) => write!(f, "{expr}"),
BrilligInputs::Array(exprs) => {
let joined = exprs.iter().map(|e| format!("{e}")).collect::<Vec<_>>().join(", ");
write!(f, "[{joined}]")
}
BrilligInputs::MemoryArray(block_id) => write!(f, "MemoryArray({})", block_id.0),
}
}
}

/// Outputs for the Brillig VM. Once the VM has completed
/// execution, this will be the object that is returned.
#[derive(Clone, PartialEq, Eq, Serialize, Deserialize, Debug, Hash)]
Expand All @@ -50,6 +63,19 @@ pub enum BrilligOutputs {
Array(Vec<Witness>),
}

impl std::fmt::Display for BrilligOutputs {
fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
match self {
BrilligOutputs::Simple(witness) => write!(f, "{witness}"),
BrilligOutputs::Array(witnesses) => {
let joined =
witnesses.iter().map(|w| format!("{w}")).collect::<Vec<_>>().join(", ");
write!(f, "[{joined}]")
}
}
}
}

/// This is purely a wrapper struct around a list of Brillig opcode's which represents
/// a full Brillig function to be executed by the Brillig VM.
/// This is stored separately on a program and accessed through a [BrilligFunctionId].
Expand Down
40 changes: 27 additions & 13 deletions acvm-repo/acir/src/circuit/opcodes.rs
Original file line number Diff line number Diff line change
Expand Up @@ -156,46 +156,60 @@ impl<F: AcirField> std::fmt::Display for Opcode<F> {
Opcode::MemoryOp { block_id, op, predicate } => {
write!(f, "MEM ")?;
if let Some(pred) = predicate {
writeln!(f, "PREDICATE = {pred}")?;
writeln!(f, "PREDICATE: {pred}")?;
}

let is_read = op.operation.is_zero();
let is_write = op.operation == Expression::one();
if is_read {
write!(f, "(id: {}, read at: {}, value: {}) ", block_id.0, op.index, op.value)
} else if is_write {
write!(f, "(id: {}, write {} at: {}) ", block_id.0, op.value, op.index)
} else {
write!(f, "(id: {}, op {} at: {}) ", block_id.0, op.operation, op.index)
write!(f, "(id: {}, write {} at: {}) ", block_id.0, op.value, op.index)
}
}
Opcode::MemoryInit { block_id, init, block_type: databus } => {
match databus {
BlockType::Memory => write!(f, "INIT ")?,
BlockType::CallData(id) => write!(f, "INIT CALLDATA {id} ")?,
BlockType::ReturnData => write!(f, "INIT RETURNDATA ")?, // cSpell:disable-line
BlockType::ReturnData => write!(f, "INIT RETURNDATA ")?,
}
let witnesses =
init.iter().map(|w| format!("_{}", w.0)).collect::<Vec<String>>().join(", ");
init.iter().map(|w| format!("{w}")).collect::<Vec<String>>().join(", ");
write!(f, "(id: {}, len: {}, witnesses: [{witnesses}])", block_id.0, init.len())
}
// We keep the display for a BrilligCall and circuit Call separate as they
// are distinct in their functionality and we should maintain this separation for debugging.
Opcode::BrilligCall { id, inputs, outputs, predicate } => {
write!(f, "BRILLIG CALL func {id}: ")?;
if let Some(pred) = predicate {
writeln!(f, "PREDICATE = {pred}")?;
writeln!(f, "PREDICATE: {pred}")?;
}
write!(f, "inputs: {inputs:?}, ")?;
write!(f, "outputs: {outputs:?}")

let inputs = inputs
.iter()
.map(|input| format!("{input}"))
.collect::<Vec<String>>()
.join(", ");
let outputs = outputs
.iter()
.map(|output| format!("{output}"))
.collect::<Vec<String>>()
.join(", ");

write!(f, "inputs: [{inputs}], ")?;
write!(f, "outputs: [{outputs}]")
}
Opcode::Call { id, inputs, outputs, predicate } => {
write!(f, "CALL func {id}: ")?;
if let Some(pred) = predicate {
writeln!(f, "PREDICATE = {pred}")?;
writeln!(f, "PREDICATE: {pred}")?;
}
write!(f, "inputs: {inputs:?}, ")?;
write!(f, "outputs: {outputs:?}")
let inputs =
inputs.iter().map(|w| format!("{w}")).collect::<Vec<String>>().join(", ");
let outputs =
outputs.iter().map(|w| format!("{w}")).collect::<Vec<String>>().join(", ");

write!(f, "inputs: [{inputs}], ")?;
write!(f, "outputs: [{outputs}]")
}
}
}
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -89,7 +89,7 @@ impl<F: std::fmt::Display> std::fmt::Display for FunctionInput<F> {
write!(f, "({constant}, {})", self.num_bits)
}
ConstantOrWitnessEnum::Witness(witness) => {
write!(f, "(_{}, {})", witness.0, self.num_bits)
write!(f, "({}, {})", witness, self.num_bits)
}
}
}
Expand Down
4 changes: 2 additions & 2 deletions acvm-repo/acir/src/native_types/expression/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -53,10 +53,10 @@ impl<F: std::fmt::Display> std::fmt::Display for Expression<F> {
fn fmt(&self, f: &mut std::fmt::Formatter) -> std::fmt::Result {
write!(f, "EXPR [ ")?;
for i in &self.mul_terms {
write!(f, "({}, _{}, _{}) ", i.0, i.1.witness_index(), i.2.witness_index())?;
write!(f, "({}, {}, {}) ", i.0, i.1, i.2)?;
}
for i in &self.linear_combinations {
write!(f, "({}, _{}) ", i.0, i.1.witness_index())?;
write!(f, "({}, {}) ", i.0, i.1)?;
}
write!(f, "{}", self.q_c)?;

Expand Down
6 changes: 6 additions & 0 deletions acvm-repo/acir/src/native_types/witness.rs
Original file line number Diff line number Diff line change
Expand Up @@ -25,3 +25,9 @@ impl From<u32> for Witness {
Self(value)
}
}

impl std::fmt::Display for Witness {
fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
write!(f, "_{}", self.0)
}
}
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