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Jul 19, 2021
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Implement more relocation types, re-org code and fix some issues #3

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12 changes: 6 additions & 6 deletions core/iwasm/aot/aot_runtime.c
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Original file line number Diff line number Diff line change
Expand Up @@ -2776,12 +2776,12 @@ aot_table_copy(AOTModuleInstance *module_inst,
/* if src_offset >= dst_offset, copy from front to back */
/* if src_offset < dst_offset, copy from back to front */
/* merge all together */
bh_memcpy_s((uint8 *)(dst_tbl_inst) + offsetof(AOTTableInstance, data)
+ dst_offset * sizeof(uint32),
(dst_tbl_inst->cur_size - dst_offset) * sizeof(uint32),
(uint8 *)(src_tbl_inst) + offsetof(AOTTableInstance, data)
+ src_offset * sizeof(uint32),
length * sizeof(uint32));
bh_memmove_s((uint8 *)(dst_tbl_inst) + offsetof(AOTTableInstance, data)
+ dst_offset * sizeof(uint32),
(dst_tbl_inst->cur_size - dst_offset) * sizeof(uint32),
(uint8 *)(src_tbl_inst) + offsetof(AOTTableInstance, data)
+ src_offset * sizeof(uint32),
length * sizeof(uint32));
}

void
Expand Down
227 changes: 189 additions & 38 deletions core/iwasm/aot/arch/aot_reloc_riscv.c
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Original file line number Diff line number Diff line change
Expand Up @@ -5,6 +5,8 @@

#include "aot_reloc.h"

#define R_RISCV_32 1
#define R_RISCV_64 2
#define R_RISCV_CALL 18
#define R_RISCV_CALL_PLT 19
#define R_RISCV_HI20 26
Expand All @@ -13,7 +15,25 @@

#define RV_OPCODE_SW 0x23

static SymbolMap target_sym_map[] = { REG_COMMON_SYMBOLS };
void __divdi3();
void __muldi3();
void __udivdi3();
void __umoddi3();

static SymbolMap target_sym_map[] = {
REG_COMMON_SYMBOLS
REG_SYM(__divdi3),
REG_SYM(__muldi3),
REG_SYM(__udivdi3),
REG_SYM(__umoddi3),
};

static void
set_error_buf(char *error_buf, uint32 error_buf_size, const char *string)
{
if (error_buf != NULL)
snprintf(error_buf, error_buf_size, "%s", string);
}

void
get_current_target(char *target_buf, uint32 target_buf_size)
Expand All @@ -24,7 +44,12 @@ get_current_target(char *target_buf, uint32 target_buf_size)
uint32
get_plt_item_size()
{
return 16;
#if __riscv_xlen == 64
/* auipc + ld + jalr + nop + addr */
return 20;
#else
return 0;
#endif
}

SymbolMap *
Expand Down Expand Up @@ -64,17 +89,17 @@ rv_add_val(uint16 *addr, uint32 val)
/**
* Get imm_hi and imm_lo from given integer
*
* @param long given integer, signed 32bit
* @param imm given integer, signed 32bit
* @param imm_hi signed 20bit
* @param imm_lo signed 12bit
*
*/
static void
rv_calc_imm(long offset, long *imm_hi, long *imm_lo)
rv_calc_imm(int32 imm, int32 *imm_hi, int32 *imm_lo)
{
long lo;
long hi = offset / 4096;
long r = offset % 4096;
int32 lo;
int32 hi = imm / 4096;
int32 r = imm % 4096;

if (2047 < r) {
hi++;
Expand All @@ -83,7 +108,7 @@ rv_calc_imm(long offset, long *imm_hi, long *imm_lo)
hi--;
}

lo = offset - (hi * 4096);
lo = imm - (hi * 4096);

*imm_lo = lo;
*imm_hi = hi;
Expand All @@ -97,76 +122,193 @@ get_plt_table_size()

void
init_plt_table(uint8 *plt)
{}
{
#if __riscv_xlen == 64
uint32 i, num = sizeof(target_sym_map) / sizeof(SymbolMap);
uint8 *p;

for (i = 0; i < num; i++) {
p = plt;
/* auipc t1, 0 */
*(uint16*)p = 0x0317;
p += 2;
*(uint16*)p = 0x0000;
p += 2;
/* ld t1, 8(t1) */
*(uint16*)p = 0x3303;
p += 2;
*(uint16*)p = 0x00C3;
p += 2;
/* jr t1 */
*(uint16*)p = 0x8302;
p += 2;
/* nop */
*(uint16*)p = 0x0001;
p += 2;
bh_memcpy_s(p, 8, &target_sym_map[i].symbol_addr, 8);
p += 8;
plt += get_plt_item_size();
}
#endif
}

typedef struct RelocTypeStrMap {
uint32 reloc_type;
char *reloc_str;
} RelocTypeStrMap;

#define RELOC_TYPE_MAP(reloc_type) { reloc_type, #reloc_type }

static RelocTypeStrMap reloc_type_str_maps[] = {
RELOC_TYPE_MAP(R_RISCV_32),
RELOC_TYPE_MAP(R_RISCV_CALL),
RELOC_TYPE_MAP(R_RISCV_CALL_PLT),
RELOC_TYPE_MAP(R_RISCV_HI20),
RELOC_TYPE_MAP(R_RISCV_LO12_I),
RELOC_TYPE_MAP(R_RISCV_LO12_S),
};

static const char *
reloc_type_to_str(uint32 reloc_type)
{
uint32 i;

for (i = 0; i < sizeof(reloc_type_str_maps) / sizeof(RelocTypeStrMap); i++) {
if (reloc_type_str_maps[i].reloc_type == reloc_type)
return reloc_type_str_maps[i].reloc_str;
}

return "Unknown_Reloc_Type";
}

static bool
check_reloc_offset(uint32 target_section_size,
uint64 reloc_offset, uint32 reloc_data_size,
char *error_buf, uint32 error_buf_size)
{
if (!(reloc_offset < (uint64)target_section_size
&& reloc_offset + reloc_data_size <= (uint64)target_section_size)) {
set_error_buf(error_buf, error_buf_size,
"AOT module load failed: invalid relocation offset.");
return false;
}
return true;
}

bool
apply_relocation(AOTModule *module,
uint8 *target_section_addr,
uint32 target_section_size,
uint64 reloc_offset,
uint64 reloc_addend,
uint32 reloc_type,
void *symbol_addr,
int32 symbol_index,
char *error_buf,
uint32 error_buf_size)
uint8 *target_section_addr, uint32 target_section_size,
uint64 reloc_offset, uint64 reloc_addend, uint32 reloc_type,
void *symbol_addr, int32 symbol_index,
char *error_buf, uint32 error_buf_size)
{
long imm_hi;
long imm_lo;
int32 val, imm_hi, imm_lo, insn;
uint8 *addr = target_section_addr + reloc_offset;
char buf[128];

switch (reloc_type) {
case R_RISCV_32:
{
uint32 val_32 = (uint32)(uintptr_t)((uint8 *)symbol_addr + reloc_addend);

CHECK_RELOC_OFFSET(sizeof(uint32));
if (val_32 != (uintptr_t)((uint8 *)symbol_addr + reloc_addend)) {
goto fail_addr_out_of_range;
}

rv_set_val((uint16 *)addr, val_32);
break;
}
case R_RISCV_64:
{
uint64 val_64 = (uint64)(uintptr_t)((uint8 *)symbol_addr + reloc_addend);
CHECK_RELOC_OFFSET(sizeof(uint64));
bh_memcpy_s(addr, 8, &val_64, 8);
break;
}
case R_RISCV_CALL:
case R_RISCV_CALL_PLT:
{
long offset = (uint8 *)symbol_addr - addr;
rv_calc_imm(offset, &imm_hi, &imm_lo);
val = (int32)(intptr_t)((uint8 *)symbol_addr - addr);

CHECK_RELOC_OFFSET(sizeof(uint32));
if (val != (intptr_t)((uint8 *)symbol_addr - addr)) {
if (reloc_type == R_RISCV_CALL_PLT && symbol_index >= 0) {
/* Call runtime function by plt code */
symbol_addr = (uint8*)module->code + module->code_size
- get_plt_table_size()
+ get_plt_item_size() * symbol_index;
val = (int32)(intptr_t)((uint8*)symbol_addr - addr);
}
}

if (val != (intptr_t)((uint8 *)symbol_addr - addr)) {
goto fail_addr_out_of_range;
}

rv_calc_imm(val, &imm_hi, &imm_lo);

rv_add_val((uint16 *)addr, (imm_hi << 12));
if ((rv_get_val((uint16 *)(addr + 4)) & 0x7f) == RV_OPCODE_SW) {
/* Adjust imm for SW : S-type */

uint32 val =
val =
(((int32)imm_lo >> 5) << 25) + (((int32)imm_lo & 0x1f) << 7);

rv_add_val((uint16 *)(addr + 4), val);
}
else {
/* Adjust imm for MV(ADDI)/JALR : I-type */

rv_add_val((uint16 *)(addr + 4), ((int32)imm_lo << 20));
}
break;
}

case R_RISCV_HI20:
{
long offset = (long)symbol_addr;
uint8 *addr = target_section_addr + reloc_offset;
uint32 insn = rv_get_val((uint16 *)addr);
rv_calc_imm(offset, &imm_hi, &imm_lo);
val = (int32)(intptr_t)(symbol_addr + reloc_addend);

CHECK_RELOC_OFFSET(sizeof(uint32));
if (val != (intptr_t)((uint8 *)symbol_addr + reloc_addend)) {
goto fail_addr_out_of_range;
}

addr = target_section_addr + reloc_offset;
insn = rv_get_val((uint16 *)addr);
rv_calc_imm(val, &imm_hi, &imm_lo);
insn = (insn & 0x00000fff) | (imm_hi << 12);
rv_set_val((uint16 *)addr, insn);
break;
}

case R_RISCV_LO12_I:
{
long offset = (long)symbol_addr;
uint8 *addr = target_section_addr + reloc_offset;
uint32 insn = rv_get_val((uint16 *)addr);
rv_calc_imm(offset, &imm_hi, &imm_lo);
val = (int32)(intptr_t)(symbol_addr + reloc_addend);

CHECK_RELOC_OFFSET(sizeof(uint32));
if (val != (intptr_t)((uint8 *)symbol_addr + reloc_addend)) {
goto fail_addr_out_of_range;
}

addr = target_section_addr + reloc_offset;
insn = rv_get_val((uint16 *)addr);
rv_calc_imm(val, &imm_hi, &imm_lo);
insn = (insn & 0x000fffff) | (imm_lo << 20);
rv_set_val((uint16 *)addr, insn);
break;
}

case R_RISCV_LO12_S:
{
long offset = (long)symbol_addr;
uint8 *addr = target_section_addr + reloc_offset;
rv_calc_imm(offset, &imm_hi, &imm_lo);
uint32 val =
val = (int32)(intptr_t)(symbol_addr + reloc_addend);

CHECK_RELOC_OFFSET(sizeof(uint32));
if (val != (intptr_t)((uint8 *)symbol_addr + reloc_addend)) {
goto fail_addr_out_of_range;
}

addr = target_section_addr + reloc_offset;
rv_calc_imm(val, &imm_hi, &imm_lo);
val =
(((int32)imm_lo >> 5) << 25) + (((int32)imm_lo & 0x1f) << 7);
rv_add_val((uint16 *)addr, val);
break;
Expand All @@ -176,9 +318,18 @@ apply_relocation(AOTModule *module,
if (error_buf != NULL)
snprintf(error_buf, error_buf_size,
"Load relocation section failed: "
"invalid relocation type %ld.",
"invalid relocation type %d.",
reloc_type);
return false;
}

return true;

fail_addr_out_of_range:
snprintf(buf, sizeof(buf),
"AOT module load failed: "
"relocation truncated to fit %s failed.",
reloc_type_to_str(reloc_type));
set_error_buf(error_buf, error_buf_size, buf);
return false;
}
9 changes: 6 additions & 3 deletions core/iwasm/compilation/aot_emit_aot_file.c
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Original file line number Diff line number Diff line change
Expand Up @@ -1971,10 +1971,13 @@ aot_resolve_object_relocation_group(AOTObjectData *obj_data,
relocation->relocation_type = (uint32)type;
relocation->symbol_name = (char *)LLVMGetSymbolName(rel_sym);

/* for ".LCPIxxx" relocation, transform the symbol name to real
* section name and set addend to the symbol address */
/* for ".LCPIxxx", ".LJTIxxx" and ".LBBxxx" relocation,
* transform the symbol name to real section name and set
* addend to the offset of the symbol in the real section */
if (relocation->symbol_name
&& str_starts_with(relocation->symbol_name, ".LCPI")) {
&& (str_starts_with(relocation->symbol_name, ".LCPI")
|| str_starts_with(relocation->symbol_name, ".LJTI")
|| str_starts_with(relocation->symbol_name, ".LBB"))) {
/* change relocation->relocation_addend and relocation->symbol_name */
LLVMSectionIteratorRef contain_section;
if (!(contain_section
Expand Down
8 changes: 8 additions & 0 deletions core/iwasm/compilation/aot_emit_numberic.c
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Original file line number Diff line number Diff line change
Expand Up @@ -767,6 +767,12 @@ is_target_mips(AOTCompContext *comp_ctx)
return !strncmp(comp_ctx->target_arch, "mips", 4);
}

static bool
is_target_riscv(AOTCompContext *comp_ctx)
{
return !strncmp(comp_ctx->target_arch, "riscv", 5);
}

static bool
is_targeting_soft_float(AOTCompContext *comp_ctx, bool is_f32)
{
Expand Down Expand Up @@ -796,6 +802,8 @@ is_targeting_soft_float(AOTCompContext *comp_ctx, bool is_f32)
* so user must specify '--cpu-features=-fp' to wamrc if the target
* doesn't have or enable Floating-Point Coprocessor Option on xtensa. */
ret = (!is_f32 || strstr(feature_string, "-fp")) ? true : false;
else if (is_target_riscv(comp_ctx))
ret = !strstr(feature_string, "+d") ? true : false;
else
ret = true;

Expand Down
2 changes: 1 addition & 1 deletion core/iwasm/interpreter/wasm_interp_classic.c
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Original file line number Diff line number Diff line change
Expand Up @@ -2785,7 +2785,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
/* if s >= d, copy from front to back */
/* if s < d, copy from back to front */
/* merge all together */
bh_memcpy_s(
bh_memmove_s(
(uint8 *)(dst_tbl_inst) + offsetof(WASMTableInstance, base_addr)
+ d * sizeof(uint32),
(dst_tbl_inst->cur_size - d) * sizeof(uint32),
Expand Down
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