N. KHOSROSHAHI

Dream Big! Never Give Up!

Academic Background

Najmeh Khosroshahi obtained her Master's of Applied Science from University of Victoria, Victoria, B.C., Canada and Bachelor's of Applied Science from University of Tehran, Tehran, Iran both in Electrical Engineering with a minor in Wireless Communications.

Research Interests

• Artificial Intelligence(AI)
• Applied Sustainability Technology
• Human Factors and Ergonomics
• Smart Grid(SG) Applications
• Signal/Image/Video Processing
• Wireless Communication Networks
• Intelligent Transportation Systems(ITS)/ Electric Vehicles(EV)
• Machine Learning(ML)/ Deep Learning(DL)

Publications

Published Book:

• Inter-vehicle Communication Systems Improvement:

Having Safety and Speed Synchronized Requires the Best Possible Error Correction in Communication Systems

• Publisher : LAP LAMBERT Academic Publishing (March 11, 2014)
• Language : English
• Paperback : 100 pages
• ISBN-10 : 3659393983
• ISBN-13 : 978-3659393983
• Item Weight : 5.6 ounces
• Dimensions : 5.91 x 0.23 x 8.66 inches

Published Papers:

• N. Khosroshahi and T. A. Gulliver,"Low Density Parity Check (LDPC) Codes for Dedicated Short Range Communication (DSRC) Systems", IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, University of Victoria, Victoria, B.C., Canada, August 2009.
• N. Khosroshahi and T. A. Gulliver,"Quasi-Cyclic Low Density Parity Check Codes for Dedicated Short Range Communication(DSRC) Systems", CCECE Canadian Conference on Electrical and Computer Engineering, Calgary, AB, Canada, May 2010.

Seminar:

• N. Khosroshahi,"Quasi – Cyclic LDPC Codes for Dedicated Short Range Communication (DSRC) Systems", Department of Electrical and Computer Engineering, University of Victoria, Victoria, B.C., Canada, July 2011.

Thesis Research Topic

Low Density Parity Check(LDPC) Codes for Dedicated Short Range Communication(DSRC) Systems.

DSpace_Link

• Analyzation/optimization of Forward Error Correction(FEC) coding method applied in inter-vehicle wireless communication systems.
• Suggestion of Low Density Parity Check (LDPC) Codes with less complexity therefore less expenses as an FEC coding method with much better performance in compare with conventional Convolutional coding method in Dedicated Short Range Communication(DSRC) systems.
• Investigation of the Quasi-Cyclic LDPC codes' feasibility for DSRC systems via MATLAB programming and presenting it as a simpler, less expensive and even more efficient coding technique for DSRC systems which is considered as an Internet of Thing(IoT) in Intelligent Transportation Systems(ITS).

Software and Programming Skills

Programming Languages Skills

• MATLAB, Microsoft Visual C++, VHDL (Xilinx ISE Simulator and Programming) - Advanced
• Python, Verilog (ModelSim Simulator and Programming), Dreamweaver/HTML - Intermediate

Design and Simulation Skills

• MATLAB, MATLAB-Simulink, Xilinx ISE Simulator and Programming (VHDL for FPGAs Virtex5 and Spartan3)- Advanced
• OPNET(Network Simulator), PSPICE/HSPICE(Analog Circuit Simulator), MAX+PLUS and Altera Quartus (Verilog for PLDs, MAX 7000s) - Intermediate

Software Skills

• LaTeX, Cool Edit, MSOFFICE (Word, PowerPoint, Excel, Visio, FrontPage/HTML) - Advanced
• Altium Designer(PCB Design Software and Tools) - Beginner

Professional Experience

1. Software Developer

• Design, build, and maintain efficient, reusable, and reliable Visual Studio C++ code for the required application.
• Via final application, client must be able to:
• Choose the desired product/interface/input data(internal counter/external sinusoidal waveform generated by Signal Generator)
• Program a FPGA/FPGAs accordingly
• Save the received data logs on the computer to verify
• Monitor received/transmitted waveform from/to high capacity local DSP SDRAM memory
• Run/Monitor real-time data streaming to/from Analog/Digital processing boards

2. English Educator

• Teaching Cambridge Gold books to pre-intermediate, intermediate and advanced students.

3. Research and Development (R&D) Engineer

Phase I - Smart Grid(SG) Networks

• Translate customer’s requirement to the project technical documentation.
• Research/Extract Smart Network telecommunication subsystems including WFAN/WAN, FAN/NAN, CPN(HAN/BAN/IAN) used in telecommunication and IOT industries.
• Research/Extract telecommunication requirements for Smart Grid (SG) applications including AMI, DR, WASA, DER, PHEV, DA, WAMCAP, etc.
• Recommend available wired/wireless communication technologies satisfying communication needs such as Optical Fiber, PLC, xDSL, Cellular (3G, 4G), WiMAX, WiFi, ZigBee, and Bluetooth.
• Investigate/Analyze “IEEE Guide for Smart Grid (SG) Interoperability of Energy Technology and Information Technology Operation with Electrical Power System (EPS), End Use Application and Loads” – (Standardized as IEEE 2030).
• Prepare and present an overall report on results.

Phase II – Electrical Vehicles (EV)

• Research/Extract Electrical Vehicles (EVs) telecommunications requirements (including signal band width, data rate, coding rate, modulation types, OFDM symbol duration, etc.)
• Research/extract the best suited available standard of Smart Grid(SG) telecommunication subsystems for the performing pilot.
• Prepare and present an overall report on results.

4. University Instructor

University of Applied Science and Technology, Tehran, Iran

• Responsibilities: Teaching Computer Science/ICT undergraduate students.
• Courses: Network Communications, Discrete Mathematics, Probability and Statistics, General Mathematics, Digital Logic Circuit, TCP/IP Protocols, Routing and Hardware Switching, Professional English, Workshop on Local Networks, Documentation.

5. Modem System Optimization Engineer

• Conduct Digital/Analog Signal Processing via RTL coding and MATLAB simulations for system performance evaluation and optimization.
• Develop VHDL codes to program XILINX FPGAs of module boards and verify the results via MATLAB and ISE Simulator.
• Develop GUI via Visual C++ software programming for sanity check.

6. Processing Prototype Boards Tester

• Develop VHDL codes for the prototype processing boards mainly used in telecommunication, broadcasting and IOT industries via Xilinx ISE Simulator and Programming
• Develop VHDL codes based on the desired applications to transmit/receive signal through specific interface such as PCI, PCIe, GbEthernet and USB.
• Analysis/verification of data to obtain the satisfactory expectations via MATLAB.
• Debug/solve the problems by examination of PCB schematics via Altium Designer.
• Design GUI via VC++ programming for quality assurance of the product.

7. Wireless Interoperability Protocol Associate - IOT Team

• Research in Motion (RIM), Kanata, Ottawa, ON, Canada

8. Teaching Assistant

University of Victoria, Victoria, BC. Canada

• Courses: Communication Systems, Mobile Communications, Applied Electronics and Electric Machines.

9. Research Assistant

• University of Victoria, Victoria, BC. Canada

Relevant Training Courses

• Python in Machin Learning(ML), 72-Hour (Online Course)
• MATLAB for development of wireless communications (specifically FEC block), 160-Hour
• MATLAB for the sanity check and quality assurance of the product - 180-Hour
• Microsoft Visual Studio C++ software programming for developing test procedure/providing GUI, 180-Hour
• Xilinx ISE Simulator and Programming software/VHDL for analog/digital processing boards, 180-Hour
• CDMA, Wi-Fi, UMTS technologies, 16-Hour
• C++ for Electrical Engineering, 72-Hour (Online Course)

References

T.Aaron Gulliver	Mahmoud Shahabadi	Nasser Masoumi	Renato Sitton	Saman Mardani
Professor	Professor	Professor	Team Lead	Chairman of the Board
University of Victoria	University of Tehran	University of Tehran	Research In Motion	Pardis Novel Processing Technology
[email protected]	[email protected]	[email protected]	[email protected]	[email protected]