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[AArch64] Emit HINT instead of PAC insns in Armv8.2-A or below
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Summary:
The Pointer Authentication Extension (PAC) was added in Armv8.3-A. Some
instructions are implemented in the HINT space to allow compiling code
common to CPUs regardless of whether they feature PAC or not, and still
benefit from PAC protection in the PAC-enabled CPUs.

The 8.3-specific mnemonics were currently enabled in any architecture, and
LLVM was emitting them in assembly files when PAC code generation was
enabled. This was ok for compilations where both LLVM codegen and the
integrated assembler were used. However, the LLVM codegen was not
compatible with other assemblers (e.g. GAS). Given the fact that the
approach from these assemblers (i.e. to disallow Armv8.3-A mnemonics if
compiling for Armv8.2-A or lower) is entirely reasonable, this patch makes
LLVM to emit HINT when building for Armv8.2-A and below, instead of
PACIASP, AUTIASP and friends. Then, LLVM assembly should be compatible
with other assemblers.

Reviewers: samparker, chill, LukeCheeseman

Subscribers: kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71658
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@pbarrio
pbarrio committed Jan 13, 2020
1 parent 8e8ccf4 commit da33762
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Showing 13 changed files with 247 additions and 130 deletions.
48 changes: 33 additions & 15 deletions llvm/lib/Target/AArch64/AArch64InstrInfo.td
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Original file line number Diff line number Diff line change
Expand Up @@ -815,38 +815,56 @@ let Predicates = [HasComplxNum, HasNEON] in {

// v8.3a Pointer Authentication
// These instructions inhabit part of the hint space and so can be used for
// armv8 targets
// armv8 targets. Keeping the old HINT mnemonic when compiling without PA is
// important for compatibility with other assemblers (e.g. GAS) when building
// software compatible with both CPUs that do or don't implement PA.
let Uses = [LR], Defs = [LR] in {
def PACIAZ : SystemNoOperands<0b000, "paciaz">;
def PACIBZ : SystemNoOperands<0b010, "pacibz">;
def PACIAZ : SystemNoOperands<0b000, "hint #24">;
def PACIBZ : SystemNoOperands<0b010, "hint #26">;
let isAuthenticated = 1 in {
def AUTIAZ : SystemNoOperands<0b100, "autiaz">;
def AUTIBZ : SystemNoOperands<0b110, "autibz">;
def AUTIAZ : SystemNoOperands<0b100, "hint #28">;
def AUTIBZ : SystemNoOperands<0b110, "hint #30">;
}
}
let Uses = [LR, SP], Defs = [LR] in {
def PACIASP : SystemNoOperands<0b001, "paciasp">;
def PACIBSP : SystemNoOperands<0b011, "pacibsp">;
def PACIASP : SystemNoOperands<0b001, "hint #25">;
def PACIBSP : SystemNoOperands<0b011, "hint #27">;
let isAuthenticated = 1 in {
def AUTIASP : SystemNoOperands<0b101, "autiasp">;
def AUTIBSP : SystemNoOperands<0b111, "autibsp">;
def AUTIASP : SystemNoOperands<0b101, "hint #29">;
def AUTIBSP : SystemNoOperands<0b111, "hint #31">;
}
}
let Uses = [X16, X17], Defs = [X17], CRm = 0b0001 in {
def PACIA1716 : SystemNoOperands<0b000, "pacia1716">;
def PACIB1716 : SystemNoOperands<0b010, "pacib1716">;
def PACIA1716 : SystemNoOperands<0b000, "hint #8">;
def PACIB1716 : SystemNoOperands<0b010, "hint #10">;
let isAuthenticated = 1 in {
def AUTIA1716 : SystemNoOperands<0b100, "autia1716">;
def AUTIB1716 : SystemNoOperands<0b110, "autib1716">;
def AUTIA1716 : SystemNoOperands<0b100, "hint #12">;
def AUTIB1716 : SystemNoOperands<0b110, "hint #14">;
}
}

let Uses = [LR], Defs = [LR], CRm = 0b0000 in {
def XPACLRI : SystemNoOperands<0b111, "xpaclri">;
def XPACLRI : SystemNoOperands<0b111, "hint #7">;
}

// These pointer authentication isntructions require armv8.3a
// These pointer authentication instructions require armv8.3a
let Predicates = [HasPA] in {

// When compiling with PA, there is a better mnemonic for these instructions.
def : InstAlias<"paciaz", (PACIAZ), 1>;
def : InstAlias<"pacibz", (PACIBZ), 1>;
def : InstAlias<"autiaz", (AUTIAZ), 1>;
def : InstAlias<"autibz", (AUTIBZ), 1>;
def : InstAlias<"paciasp", (PACIASP), 1>;
def : InstAlias<"pacibsp", (PACIBSP), 1>;
def : InstAlias<"autiasp", (AUTIASP), 1>;
def : InstAlias<"autibsp", (AUTIBSP), 1>;
def : InstAlias<"pacia1716", (PACIA1716), 1>;
def : InstAlias<"pacib1716", (PACIB1716), 1>;
def : InstAlias<"autia1716", (AUTIA1716), 1>;
def : InstAlias<"autib1716", (AUTIB1716), 1>;
def : InstAlias<"xpaclri", (XPACLRI), 1>;

multiclass SignAuth<bits<3> prefix, bits<3> prefix_z, string asm> {
def IA : SignAuthOneData<prefix, 0b00, !strconcat(asm, "ia")>;
def IB : SignAuthOneData<prefix, 0b01, !strconcat(asm, "ib")>;
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45 changes: 28 additions & 17 deletions llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll
View file
Original file line number Diff line number Diff line change
@@ -1,14 +1,18 @@
; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s
; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s --check-prefixes CHECK,V8A
; RUN-V83A: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
; RUN-V83A: aarch64-arm-none-eabi -mattr=+v8.3a %s -o - > %t
; RUN-V83A: FileCheck --check-prefixes CHECK,V83A < %t %s

; Function a's outlining candidate contains a sp modifying add without a
; corresponsing sub, so we shouldn't outline it.
define void @a() "sign-return-address"="all" "sign-return-address-key"="b_key" {
; CHECK-LABEL: a: // @a
; CHECK: // %bb.0:
; CHECK-NEXT: .cfi_b_key_frame
; CHECK-NEXT: pacibsp
; CHECK-NEXT: .cfi_negate_ra_state
; CHECK-LABEL: a: // @a
; CHECK: // %bb.0:
; CHECK-NEXT: .cfi_b_key_frame
; V8A-NEXT: hint #27
; V83A-NEXT: pacibsp
; V8A-NEXT, V83A-NEXT: .cfi_negate_ra_state
%1 = alloca i32, align 4
%2 = alloca i32, align 4
%3 = alloca i32, align 4
Expand All @@ -22,15 +26,17 @@ define void @a() "sign-return-address"="all" "sign-return-address-key"="b_key" {
store i32 5, i32* %5, align 4
store i32 6, i32* %6, align 4
; CHECK-NOT: bl OUTLINED_FUNCTION_{{[0-9]+}}
; CHECK: autibsp
; CECK-NEXT: ret
; V8A: hint #31
; V83A: autibsp
; CHECK-NEXT: ret
ret void
}

define void @b() "sign-return-address"="all" "sign-return-address-key"="b_key" nounwind {
; CHECK-LABEL: b: // @b
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: pacibsp
; V8A-NEXT: hint #27
; V83A-NEXT: pacibsp
%1 = alloca i32, align 4
%2 = alloca i32, align 4
%3 = alloca i32, align 4
Expand All @@ -44,15 +50,17 @@ define void @b() "sign-return-address"="all" "sign-return-address-key"="b_key" n
store i32 5, i32* %5, align 4
store i32 6, i32* %6, align 4
; CHECK: bl [[OUTLINED_FUNC:OUTLINED_FUNCTION_[0-9]+]]
; CHECK: autibsp
; CHECK-NEXT: ret
; V8A: hint #31
; V83A: autibsp
; V8A-NEXT, V83A-NEXT: ret
ret void
}

define void @c() "sign-return-address"="all" "sign-return-address-key"="b_key" nounwind {
; CHECK-LABEL: c: // @c
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: pacibsp
; V8A-NEXT: hint #27
; V83A-NEXT: pacibsp
%1 = alloca i32, align 4
%2 = alloca i32, align 4
%3 = alloca i32, align 4
Expand All @@ -66,15 +74,18 @@ define void @c() "sign-return-address"="all" "sign-return-address-key"="b_key" n
store i32 5, i32* %5, align 4
store i32 6, i32* %6, align 4
; CHECK: bl [[OUTLINED_FUNC]]
; CHECK: autibsp
; CHECK-NEXT: ret
; V8A: hint #31
; V83A: autibsp
; V8A-NEXT, V83A-NEXT: ret
ret void
}

; CHECK: [[OUTLINED_FUNC]]
; CHECK: // %bb.0:
; CHECK-NEXT: .cfi_b_key_frame
; CHECK-NEXT: pacibsp
; V8A-NEXT: hint #27
; V83A-NEXT: pacibsp
; CHECK-NEXT: .cfi_negate_ra_state
; CHECK: autibsp
; CHECK-NEXT: ret
; V8A: hint #31
; V83A: autibsp
; V8A-NEXT, V83A-NEXT: ret
29 changes: 19 additions & 10 deletions llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll
View file
Original file line number Diff line number Diff line change
@@ -1,9 +1,13 @@
; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s
; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s --check-prefixes CHECK,V8A
; RUN-V83A: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
; RUN-V83A: aarch64-arm-none-eabi -mattr=+v8.3a %s -o - > %t
; RUN-V83A: FileCheck --check-prefixes CHECK,V83A < %t %s

define void @a() "sign-return-address"="all" {
; CHECK-LABEL: a: // @a
; CHECK: paciasp
; V8A: hint #25
; V83A: paciasp
; CHECK-NEXT: .cfi_negate_ra_state
%1 = alloca i32, align 4
%2 = alloca i32, align 4
Expand All @@ -17,14 +21,16 @@ define void @a() "sign-return-address"="all" {
store i32 4, i32* %4, align 4
store i32 5, i32* %5, align 4
store i32 6, i32* %6, align 4
; CHECK: autiasp
; V8A: hint #29
; V83A: autiasp
ret void
; CHECK: .cfi_endproc
}

define void @b() "sign-return-address"="non-leaf" {
; CHECK-LABEL: b: // @b
; CHECK-NOT: paciasp
; CHECK-LABE: b: // @b
; V8A-NOT: hint #25
; V83A-NOT: paciasp
; CHECK-NOT: .cfi_negate_ra_state
%1 = alloca i32, align 4
%2 = alloca i32, align 4
Expand All @@ -38,15 +44,17 @@ define void @b() "sign-return-address"="non-leaf" {
store i32 4, i32* %4, align 4
store i32 5, i32* %5, align 4
store i32 6, i32* %6, align 4
; CHECK-NOT: autiasp
; V8A-NOT: hint #29
; V83A-NOT: autiasp
ret void
; CHECK: .cfi_endproc
}

define void @c() "sign-return-address"="all" {
; CHECK-LABEL: c: // @c
; CHECK: paciasp
; CHECK-NEXT: .cfi_negate_ra_state
; CHECK-LABEL: c: // @c
; V8A: hint #25
; V83A: paciasp
; V8A-NEXT, V83A-NEXT: .cfi_negate_ra_state
%1 = alloca i32, align 4
%2 = alloca i32, align 4
%3 = alloca i32, align 4
Expand All @@ -59,7 +67,8 @@ define void @c() "sign-return-address"="all" {
store i32 4, i32* %4, align 4
store i32 5, i32* %5, align 4
store i32 6, i32* %6, align 4
; CHECK: autiasp
; V8A: hint #29
; V83A: autiasp
ret void
; CHECK: .cfi_endproc
}
Expand Down
15 changes: 11 additions & 4 deletions llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll
View file
Original file line number Diff line number Diff line change
@@ -1,10 +1,14 @@
; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s
; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s --check-prefixes CHECK,V8A
; RUN-V83A: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
; RUN-V83A: aarch64-arm-none-eabi -mattr=+v8.3a %s -o - > %t
; RUN-V83A: FileCheck --check-prefixes CHECK,V83A < %t %s

define i64 @a(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key"="b_key" {
; CHECK-LABEL: a: // @a
; CHECK: .cfi_b_key_frame
; CHECK-NEXT: pacibsp
; V8A-NEXT: hint #27
; V83A-NEXT: pacibsp
; CHECK-NEXT: .cfi_negate_ra_state
%1 = alloca i32, align 4
%2 = alloca i32, align 4
Expand All @@ -25,7 +29,8 @@ define i64 @a(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key"
define i64 @b(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key"="b_key" {
; CHECK-LABEL: b: // @b
; CHECK: .cfi_b_key_frame
; CHECK-NEXT: pacibsp
; V8A-NEXT: hint #27
; V83A-NEXT: pacibsp
; CHECK-NEXT: .cfi_negate_ra_state
%1 = alloca i32, align 4
%2 = alloca i32, align 4
Expand All @@ -46,7 +51,8 @@ define i64 @b(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key"
define i64 @c(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key"="b_key" {
; CHECK-LABEL: c: // @c
; CHECK: .cfi_b_key_frame
; CHECK-NEXT: pacibsp
; V8A-NEXT: hint #27
; V83A-NEXT: pacibsp
; CHECK-NEXT: .cfi_negate_ra_state
%1 = alloca i32, align 4
%2 = alloca i32, align 4
Expand All @@ -68,5 +74,6 @@ define i64 @c(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key"
; CHECK-LABEL: OUTLINED_FUNCTION_0:
; CHECK-NOT: .cfi_b_key_frame
; CHECK-NOT: paci{{[a,b]}}sp
; CHECK-NOT: hint #2{{[5,7]}}
; CHECK-NOT: .cfi_negate_ra_state
; CHECK-NOT: auti{{[a,b]}}sp
23 changes: 16 additions & 7 deletions llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll
View file
Original file line number Diff line number Diff line change
@@ -1,9 +1,13 @@
; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s
; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s --check-prefixes CHECK,V8A
; RUN-V83A: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
; RUN-V83A: aarch64-arm-none-eabi -mattr=+v8.3a %s -o - > %t
; RUN-V83A: FileCheck --check-prefixes CHECK,V83A < %t %s

define void @a() "sign-return-address"="all" {
; CHECK-LABEL: a: // @a
; CHECK: paciasp
; V8A: hint #25
; V83A: paciasp
; CHECK-NEXT: .cfi_negate_ra_state
%1 = alloca i32, align 4
%2 = alloca i32, align 4
Expand All @@ -17,15 +21,17 @@ define void @a() "sign-return-address"="all" {
store i32 4, i32* %4, align 4
store i32 5, i32* %5, align 4
store i32 6, i32* %6, align 4
; CHECK: autiasp
; V8A: hint #29
; V83A: autiasp
ret void
; CHECK: .cfi_endproc
}

define void @b() "sign-return-address"="all" "sign-return-address-key"="b_key" {
; CHECK-LABEL: b: // @b
; CHECK: .cfi_b_key_frame
; CHECK-NEXT: pacibsp
; V8A-NEXT: hint #27
; V83A-NEXT: pacibsp
; CHECK-NEXT: .cfi_negate_ra_state
%1 = alloca i32, align 4
%2 = alloca i32, align 4
Expand All @@ -39,14 +45,16 @@ define void @b() "sign-return-address"="all" "sign-return-address-key"="b_key" {
store i32 4, i32* %4, align 4
store i32 5, i32* %5, align 4
store i32 6, i32* %6, align 4
; CHECK-NOT: autiasp
; V8A-NOT: hint #29
; V83A-NOT: autiasp
ret void
; CHECK: .cfi_endproc
}

define void @c() "sign-return-address"="all" {
; CHECK-LABEL: c: // @c
; CHECK: paciasp
; V8A: hint #25
; V83A: paciasp
; CHECK-NEXT: .cfi_negate_ra_state
%1 = alloca i32, align 4
%2 = alloca i32, align 4
Expand All @@ -60,7 +68,8 @@ define void @c() "sign-return-address"="all" {
store i32 4, i32* %4, align 4
store i32 5, i32* %5, align 4
store i32 6, i32* %6, align 4
; CHECK: autiasp
; V8A: hint #29
; V83A: autiasp
ret void
; CHECK: .cfi_endproc
}
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