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[interpreter] Add a missing closing parens
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Missed it in WebAssembly#466.
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ngzhian committed Feb 18, 2021
1 parent 4c442ce commit 31efb15
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion interpreter/exec/simd.ml
Original file line number Diff line number Diff line change
Expand Up @@ -450,7 +450,7 @@ struct
let trunc_sat_f32x4_u = convert I32_convert.trunc_sat_f32_u

let convert_zero f v =
Rep.(of_i32x4 I32.(zero :: zero :: (List.map f (to_f64x2 v)))
Rep.(of_i32x4 I32.(zero :: zero :: (List.map f (to_f64x2 v))))
let trunc_sat_f64x2_s_zero = convert_zero I32_convert.trunc_sat_f64_s
let trunc_sat_f64x2_u_zero = convert_zero I32_convert.trunc_sat_f64_u

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