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Merge pull request #436 from jphickey:fix-435-pspmod-covtests
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Fix #435, add coverage tests for PSP modules
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dzbaker committed Sep 16, 2024
2 parents d74d188 + 2336dde commit 61b1230
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927 changes: 20 additions & 907 deletions fsw/inc/cfe_psp.h

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62 changes: 62 additions & 0 deletions fsw/inc/cfe_psp_cache_api.h
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/************************************************************************
* NASA Docket No. GSC-18,719-1, and identified as “core Flight System: Bootes”
*
* Copyright (c) 2020 United States Government as represented by the
* Administrator of the National Aeronautics and Space Administration.
* All Rights Reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License"); you may
* not use this file except in compliance with the License. You may obtain
* a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
************************************************************************/

/*
** Author: A. Cudmore
**
** Purpose: This file contains the cFE Platform Support Package(PSP)
** prototypes.
** The PSP routines serve as the "glue" between the RTOS and
** the cFE Flight Software. The routines fill gaps that are not
** really considered part of the OS Abstraction, but are required
** for the cFE flight software implementation. It is possible that
** some of these routines could migrate into the OS AL.
**
*/

#ifndef CFE_PSP_CACHE_API_H
#define CFE_PSP_CACHE_API_H

/******************************************************************************
INCLUDE FILES
******************************************************************************/

#include "common_types.h"
#include "osapi.h"

#include "cfe_psp_error.h"

/******************************************************************************
FUNCTION PROTOTYPES
******************************************************************************/

/*--------------------------------------------------------------------------------------*/
/**
* @brief This is a BSP-specific cache flush routine
*
* Provides a common interface to flush the processor caches. This routine is in
* the BSP because it is sometimes implemented in hardware and sometimes taken
* care of by the RTOS.
*
* @param[in] type
* @param[in] address
* @param[in] size
*/
void CFE_PSP_FlushCaches(uint32 type, void *address, uint32 size);

#endif
82 changes: 82 additions & 0 deletions fsw/inc/cfe_psp_cds_api.h
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/************************************************************************
* NASA Docket No. GSC-18,719-1, and identified as “core Flight System: Bootes”
*
* Copyright (c) 2020 United States Government as represented by the
* Administrator of the National Aeronautics and Space Administration.
* All Rights Reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License"); you may
* not use this file except in compliance with the License. You may obtain
* a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
************************************************************************/

/*
** Author: A. Cudmore
**
** Purpose: This file contains the cFE Platform Support Package(PSP)
** prototypes.
** The PSP routines serve as the "glue" between the RTOS and
** the cFE Flight Software. The routines fill gaps that are not
** really considered part of the OS Abstraction, but are required
** for the cFE flight software implementation. It is possible that
** some of these routines could migrate into the OS AL.
**
*/

#ifndef CFE_PSP_CDS_API_H
#define CFE_PSP_CDS_API_H

/******************************************************************************
INCLUDE FILES
******************************************************************************/

#include "common_types.h"
#include "osapi.h"

#include "cfe_psp_error.h"

/******************************************************************************
FUNCTION PROTOTYPES
******************************************************************************/

/*--------------------------------------------------------------------------------------*/
/**
* @brief Fetches the size of the OS Critical Data Store area.
*
* @param[out] SizeOfCDS Pointer to the variable that will store the size of the CDS
*
* @return 0 (OS_SUCCESS or CFE_PSP_SUCCESS) on success, -1 (OS_ERROR or CFE_PSP_ERROR) on error
*/
int32 CFE_PSP_GetCDSSize(uint32 *SizeOfCDS);

/*--------------------------------------------------------------------------------------*/
/**
* @brief Writes to the CDS Block.
*
* @param[in] PtrToDataToWrite Pointer to the data that will be written to the CDS
* @param[in] CDSOffset CDS offset
* @param[in] NumBytes Number of bytes to write
*
* @return 0 (OS_SUCCESS or CFE_PSP_SUCCESS) on success, -1 (OS_ERROR or CFE_PSP_ERROR) on error
*/
int32 CFE_PSP_WriteToCDS(const void *PtrToDataToWrite, uint32 CDSOffset, uint32 NumBytes);

/*--------------------------------------------------------------------------------------*/
/**
* @brief Reads from the CDS Block
*
* @param[out] PtrToDataFromRead Pointer to the location that will store the data to be read from the CDS
* @param[in] CDSOffset CDS offset
* @param[in] NumBytes Number of bytes to read
*
* @return 0 (OS_SUCCESS or CFE_PSP_SUCCESS) on success, -1 (OS_ERROR or CFE_PSP_ERROR) on error
*/
int32 CFE_PSP_ReadFromCDS(void *PtrToDataFromRead, uint32 CDSOffset, uint32 NumBytes);

#endif
130 changes: 130 additions & 0 deletions fsw/inc/cfe_psp_eepromaccess_api.h
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/************************************************************************
* NASA Docket No. GSC-18,719-1, and identified as “core Flight System: Bootes”
*
* Copyright (c) 2020 United States Government as represented by the
* Administrator of the National Aeronautics and Space Administration.
* All Rights Reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License"); you may
* not use this file except in compliance with the License. You may obtain
* a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
************************************************************************/

/*
** Author: A. Cudmore
**
** Purpose: This file contains the cFE Platform Support Package(PSP)
** prototypes.
** The PSP routines serve as the "glue" between the RTOS and
** the cFE Flight Software. The routines fill gaps that are not
** really considered part of the OS Abstraction, but are required
** for the cFE flight software implementation. It is possible that
** some of these routines could migrate into the OS AL.
**
*/

#ifndef CFE_PSP_EEPROMACCESS_API_H
#define CFE_PSP_EEPROMACCESS_API_H

/******************************************************************************
INCLUDE FILES
******************************************************************************/

#include "common_types.h"
#include "osapi.h"

#include "cfe_psp_error.h"

/*--------------------------------------------------------------------------------------*/
/**
* @brief Write one byte (ByteValue) to EEPROM address MemoryAddress
*
* @param[out] MemoryAddress Memory address to write to
* @param[in] ByteValue Value to write to memory
*
* @retval CFE_PSP_SUCCESS on success
* @retval CFE_PSP_ERROR_TIMEOUT write operation did not go through after a specific timeout.
* @retval CFE_PSP_ERROR_ADDRESS_MISALIGNED if the address is not aligned to a 16-bit addressing scheme.
* @retval CFE_PSP_ERROR_NOT_IMPLEMENTED if not implemented
*/
int32 CFE_PSP_EepromWrite8(cpuaddr MemoryAddress, uint8 ByteValue);

/*--------------------------------------------------------------------------------------*/
/**
* @brief Write two bytes (uint16Value) to EEPROM address MemoryAddress
*
* @param[out] MemoryAddress Memory address to write to
* @param[in] uint16Value Value to write to memory
*
* @retval CFE_PSP_SUCCESS on success
* @retval CFE_PSP_ERROR_TIMEOUT write operation did not go through after a specific timeout.
* @retval CFE_PSP_ERROR_ADDRESS_MISALIGNED if the address is not aligned to a 16-bit addressing scheme.
* @retval CFE_PSP_ERROR_NOT_IMPLEMENTED if not implemented
*/
int32 CFE_PSP_EepromWrite16(cpuaddr MemoryAddress, uint16 uint16Value);

/*--------------------------------------------------------------------------------------*/
/**
* @brief Write four bytes (uint32Value) to EEPROM address MemoryAddress
*
* @param[out] MemoryAddress Memory address to write to
* @param[in] uint32Value Value to write to memory
*
* @retval CFE_PSP_SUCCESS on success
* @retval CFE_PSP_ERROR_TIMEOUT write operation did not go through after a specific timeout.
* @retval CFE_PSP_ERROR_ADDRESS_MISALIGNED if the address is not aligned to a 16-bit addressing scheme.
* @retval CFE_PSP_ERROR_NOT_IMPLEMENTED if not implemented
*/
int32 CFE_PSP_EepromWrite32(cpuaddr MemoryAddress, uint32 uint32Value);

/*--------------------------------------------------------------------------------------*/
/**
* @brief Enable the EEPROM for write operation
*
* @param[in] Bank The bank of EEPROM to enable
*
* @retval CFE_PSP_SUCCESS on success
* @retval CFE_PSP_ERROR_NOT_IMPLEMENTED if not implemented
*/
int32 CFE_PSP_EepromWriteEnable(uint32 Bank);

/*--------------------------------------------------------------------------------------*/
/**
* @brief Disable the EEPROM from write operation
*
* @param[in] Bank The bank of EEPROM to disable
*
* @retval CFE_PSP_SUCCESS on success
* @retval CFE_PSP_ERROR_NOT_IMPLEMENTED if not implemented
*/
int32 CFE_PSP_EepromWriteDisable(uint32 Bank);

/*--------------------------------------------------------------------------------------*/
/**
* @brief Power up the EEPROM
*
* @param[in] Bank The bank of EEPROM to power up
*
* @retval CFE_PSP_SUCCESS on success
* @retval CFE_PSP_ERROR_NOT_IMPLEMENTED if not implemented
*/
int32 CFE_PSP_EepromPowerUp(uint32 Bank);

/*--------------------------------------------------------------------------------------*/
/**
* @brief Power down the EEPROM
*
* @param[in] Bank The bank of EEPROM to power down
*
* @retval CFE_PSP_SUCCESS on success
* @retval CFE_PSP_ERROR_NOT_IMPLEMENTED if not implemented
*/
int32 CFE_PSP_EepromPowerDown(uint32 Bank);

#endif
1 change: 1 addition & 0 deletions fsw/inc/cfe_psp_error.h
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Expand Up @@ -15,6 +15,7 @@
* See the License for the specific language governing permissions and
* limitations under the License.
************************************************************************/

#ifndef CFE_PSP_ERROR_H
#define CFE_PSP_ERROR_H

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103 changes: 103 additions & 0 deletions fsw/inc/cfe_psp_exception_api.h
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/************************************************************************
* NASA Docket No. GSC-18,719-1, and identified as “core Flight System: Bootes”
*
* Copyright (c) 2020 United States Government as represented by the
* Administrator of the National Aeronautics and Space Administration.
* All Rights Reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License"); you may
* not use this file except in compliance with the License. You may obtain
* a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
************************************************************************/

/*
** Author: A. Cudmore
**
** Purpose: This file contains the cFE Platform Support Package(PSP)
** prototypes.
** The PSP routines serve as the "glue" between the RTOS and
** the cFE Flight Software. The routines fill gaps that are not
** really considered part of the OS Abstraction, but are required
** for the cFE flight software implementation. It is possible that
** some of these routines could migrate into the OS AL.
**
*/

#ifndef CFE_PSP_EXCEPTION_API_H
#define CFE_PSP_EXCEPTION_API_H

/******************************************************************************
INCLUDE FILES
******************************************************************************/

#include "common_types.h"
#include "osapi.h"

#include "cfe_psp_error.h"

/*--------------------------------------------------------------------------------------*/
/**
* @brief Sets up the exception environment for the chosen platform
*
* On a board, this can be configured to look at a debug flag or switch in order
* to keep the standard OS exception handlers, rather than restarting the system.
*/
void CFE_PSP_AttachExceptions(void);

/*--------------------------------------------------------------------------------------*/
/**
* @brief Defines the CPU and FPU exceptions that are enabled for each cFE Task/App
*
* This function sets a default exception environment that can be used
*
* @note The exception environment is local to each task. Therefore, this must
* be Called for each task that wants to do floating point and catch exceptions.
*/
void CFE_PSP_SetDefaultExceptionEnvironment(void);

/*--------------------------------------------------------------------------------------*/
/**
* @brief Returns the unread exception count
*
* @return The unread exception count
*/
uint32 CFE_PSP_Exception_GetCount(void);

/*--------------------------------------------------------------------------------------*/
/**
* @brief Retrieves a summary of an exception log entry
*
* @note This function returns CFE_PSP_SUCCESS to indicate that an entry was
* popped from the queue. This doesn't necessarily mean that the output fields
* have valid data, but it does mean they are initialized to something.
*
* @param[in] ContextLogId ID of the exception log entry to get a summary for
* @param[in, out] TaskId Pointer to the TaskID buffer
* @param[out] ReasonBuf Pointer to the buffer that will store the exception summary string
* @param[in] ReasonSize Maximum size of the summary string to retrieve
*
* @retval CFE_PSP_SUCCESS on success (see note above)
* @retval CFE_PSP_NO_EXCEPTION_DATA if no context available for reading
*/
int32 CFE_PSP_Exception_GetSummary(uint32 *ContextLogId, osal_id_t *TaskId, char *ReasonBuf, uint32 ReasonSize);

/*--------------------------------------------------------------------------------------*/
/**
* @brief Retrieves exception log entry context information
*
* @param[in] ContextLogId ID of the exception log entry to copy
* @param[out] ContextBuf Pointer to the buffer where the context information is to be copied to
* @param[in] ContextSize Maximum size of context information data to copy
*
* @return Size of the copied data
* @retval CFE_PSP_NO_EXCEPTION_DATA if data has expired from the memory log
*/
int32 CFE_PSP_Exception_CopyContext(uint32 ContextLogId, void *ContextBuf, uint32 ContextSize);

#endif
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