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Work on I2C for STM32F7xx #492

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merged 1 commit into from Sep 10, 2017
Merged

Work on I2C for STM32F7xx #492

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8 changes: 4 additions & 4 deletions targets/CMSIS-OS/ChibiOS/MBN_QUAIL/board.h
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Original file line number Diff line number Diff line change
Expand Up @@ -335,12 +335,12 @@
PIN_PUPDR_FLOATING(GPIOA_AN4) | \
PIN_PUPDR_FLOATING(GPIOA_AN1) | \
PIN_PUPDR_FLOATING(GPIOA_AN3) | \
PIN_PUPDR_FLOATING(GPIOA_FLASH_HOLD) | \
PIN_PUPDR_PULLDOWN(GPIOA_FLASH_HOLD) | \
PIN_PUPDR_FLOATING(GPIOA_TX4) | \
PIN_PUPDR_FLOATING(GPIOA_RX4) | \
PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | \
PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) | \
PIN_PUPDR_PULLDOWN(GPIOA_FLASH_CS) | \
PIN_PUPDR_FLOATING(GPIOA_FLASH_CS) | \
PIN_PUPDR_FLOATING(GPIOA_INT4) | \
PIN_PUPDR_FLOATING(GPIOA_GPIO1))
#define VAL_GPIOA_ODR (PIN_ODR_LOW(GPIOA_PA0) | \
Expand All @@ -351,12 +351,12 @@
PIN_ODR_LOW(GPIOA_AN4) | \
PIN_ODR_LOW(GPIOA_AN1) | \
PIN_ODR_LOW(GPIOA_AN3) | \
PIN_ODR_HIGH(GPIOA_FLASH_HOLD) | \
PIN_ODR_LOW(GPIOA_FLASH_HOLD) | \
PIN_ODR_LOW(GPIOA_TX4) | \
PIN_ODR_LOW(GPIOA_RX4) | \
PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | \
PIN_ODR_HIGH(GPIOA_OTG_FS_DP) | \
PIN_ODR_LOW(GPIOA_FLASH_CS) | \
PIN_ODR_HIGH(GPIOA_FLASH_CS) | \
PIN_ODR_LOW(GPIOA_INT4) | \
PIN_ODR_LOW(GPIOA_GPIO1))
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_PA0, 0U) | \
Expand Down
24 changes: 12 additions & 12 deletions targets/CMSIS-OS/ChibiOS/ST_NUCLEO144_F746ZG/board.h
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Original file line number Diff line number Diff line change
Expand Up @@ -678,8 +678,8 @@
PIN_MODE_INPUT(GPIOB_ZIO_D22) | \
PIN_MODE_INPUT(GPIOB_ZIO_D26) | \
PIN_MODE_OUTPUT(GPIOB_LED2) | \
PIN_MODE_INPUT(GPIOB_ARD_D15) | \
PIN_MODE_INPUT(GPIOB_ARD_D14) | \
PIN_MODE_ALTERNATE(GPIOB_I2C1_SCL) | \
PIN_MODE_ALTERNATE(GPIOB_I2C1_SDA) | \
PIN_MODE_INPUT(GPIOB_ZIO_D36) | \
PIN_MODE_INPUT(GPIOB_ZIO_D35) | \
PIN_MODE_INPUT(GPIOB_ZIO_D19) | \
Expand All @@ -694,8 +694,8 @@
PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D22) | \
PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D26) | \
PIN_OTYPE_PUSHPULL(GPIOB_LED2) | \
PIN_OTYPE_PUSHPULL(GPIOB_ARD_D15) | \
PIN_OTYPE_PUSHPULL(GPIOB_ARD_D14) | \
PIN_OTYPE_OPENDRAIN(GPIOB_I2C1_SCL) | \
PIN_OTYPE_OPENDRAIN(GPIOB_I2C1_SDA) | \
PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D36) | \
PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D35) | \
PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D19) | \
Expand All @@ -710,8 +710,8 @@
PIN_OSPEED_HIGH(GPIOB_ZIO_D22) | \
PIN_OSPEED_HIGH(GPIOB_ZIO_D26) | \
PIN_OSPEED_HIGH(GPIOB_LED2) | \
PIN_OSPEED_HIGH(GPIOB_ARD_D15) | \
PIN_OSPEED_HIGH(GPIOB_ARD_D14) | \
PIN_OSPEED_HIGH(GPIOB_I2C1_SCL) | \
PIN_OSPEED_HIGH(GPIOB_I2C1_SDA) | \
PIN_OSPEED_HIGH(GPIOB_ZIO_D36) | \
PIN_OSPEED_HIGH(GPIOB_ZIO_D35) | \
PIN_OSPEED_HIGH(GPIOB_ZIO_D19) | \
Expand All @@ -726,8 +726,8 @@
PIN_PUPDR_PULLUP(GPIOB_ZIO_D22) | \
PIN_PUPDR_PULLUP(GPIOB_ZIO_D26) | \
PIN_PUPDR_FLOATING(GPIOB_LED2) | \
PIN_PUPDR_PULLUP(GPIOB_ARD_D15) | \
PIN_PUPDR_PULLUP(GPIOB_ARD_D14) | \
PIN_PUPDR_FLOATING(GPIOB_I2C1_SCL) | \
PIN_PUPDR_FLOATING(GPIOB_I2C1_SDA) | \
PIN_PUPDR_PULLUP(GPIOB_ZIO_D36) | \
PIN_PUPDR_PULLUP(GPIOB_ZIO_D35) | \
PIN_PUPDR_PULLUP(GPIOB_ZIO_D19) | \
Expand All @@ -742,8 +742,8 @@
PIN_ODR_HIGH(GPIOB_ZIO_D22) | \
PIN_ODR_HIGH(GPIOB_ZIO_D26) | \
PIN_ODR_LOW(GPIOB_LED2) | \
PIN_ODR_HIGH(GPIOB_ARD_D15) | \
PIN_ODR_HIGH(GPIOB_ARD_D14) | \
PIN_ODR_LOW(GPIOB_I2C1_SCL) | \
PIN_ODR_LOW(GPIOB_I2C1_SDA) | \
PIN_ODR_HIGH(GPIOB_ZIO_D36) | \
PIN_ODR_HIGH(GPIOB_ZIO_D35) | \
PIN_ODR_HIGH(GPIOB_ZIO_D19) | \
Expand All @@ -758,8 +758,8 @@
PIN_AFIO_AF(GPIOB_ZIO_D22, 0U) | \
PIN_AFIO_AF(GPIOB_ZIO_D26, 0U) | \
PIN_AFIO_AF(GPIOB_LED2, 0U))
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_ARD_D15, 0U) | \
PIN_AFIO_AF(GPIOB_ARD_D14, 0U) | \
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_I2C1_SCL, 4U) | \
PIN_AFIO_AF(GPIOB_I2C1_SDA, 4U) | \
PIN_AFIO_AF(GPIOB_ZIO_D36, 0U) | \
PIN_AFIO_AF(GPIOB_ZIO_D35, 0U) | \
PIN_AFIO_AF(GPIOB_ZIO_D19, 0U) | \
Expand Down
6 changes: 3 additions & 3 deletions targets/CMSIS-OS/ChibiOS/ST_NUCLEO144_F746ZG/nanoCLR/mcuconf.h
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Original file line number Diff line number Diff line change
Expand Up @@ -81,7 +81,7 @@
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_SDMMCSEL STM32_SDMMCSEL_SYSCLK
#define STM32_SRAM2_NOCACHE FALSE

/*
* ADC driver system settings.
*/
Expand Down Expand Up @@ -172,8 +172,8 @@
/*
* I2C driver system settings.
*/
#define STM32_I2C_USE_I2C1 FALSE
#define STM32_I2C_USE_I2C2 FALSE
#define STM32_I2C_USE_I2C1 TRUE
#define STM32_I2C_USE_I2C2 TRUE
#define STM32_I2C_USE_I2C3 FALSE
#define STM32_I2C_USE_I2C4 FALSE
#define STM32_I2C_BUSY_TIMEOUT 50
Expand Down
39 changes: 23 additions & 16 deletions .../ChibiOS/nanoCLR/Windows.Devices.I2c/win_dev_i2c_native_Windows_Devices_I2C_I2cDevice.cpp
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Original file line number Diff line number Diff line change
@@ -1,14 +1,7 @@
//-----------------------------------------------------------------------------
//
// ** WARNING! **
// This file was generated automatically by a tool.
// Re-running the tool will overwrite this file.
// You should copy this file to a custom location
// before adding any customization in the copy to
// prevent loss of your changes when the tool is
// re-run.
// Copyright (c) 2017 The nanoFramework project contributors
// See LICENSE file in the project root for full license information.
//
//-----------------------------------------------------------------------------

#include <ch.h>
#include <hal.h>
Expand Down Expand Up @@ -71,16 +64,30 @@ nfI2CConfig Library_win_dev_i2c_native_Windows_Devices_I2c_I2cDevice::GetConfig(
#if STM32_I2C_USE_I2C3
case 3 : _drv = &I2CD3;
break;
#endif
#if STM32_I2C_USE_I2C4
case 4 : _drv = &I2CD4;
break;
#endif
}

// Create the final configuration
nfI2CConfig cfg =
{
{
#ifdef STM32F4xx_MCUCONF
OPMODE_I2C,
busSpeed == I2cBusSpeed_StandardMode ? 100000U : 400000U,
busSpeed == I2cBusSpeed_StandardMode ? STD_DUTY_CYCLE : FAST_DUTY_CYCLE_2
#endif
#ifdef STM32F7xx_MCUCONF
// Standard mode : 100 KHz, Rise time 120 ns, Fall time 25 ns, 54MHz clock source
// Fast mode : 400 KHz, Rise time 120 ns, Fall time 25 ns, 54MHz clock source
// Timing register value calculated by STM32 CubeMx
busSpeed == I2cBusSpeed_StandardMode ? 0x80201721 : 0x00B01B59,
0,
0
#endif
},
_drv,
(uint16_t)slaveAddress
Expand Down Expand Up @@ -122,7 +129,7 @@ HRESULT Library_win_dev_i2c_native_Windows_Devices_I2c_I2cDevice::NativeTransmit
// get bus index
// this is coded with a multiplication, need to perform and int division to get the number
// see the comments in the SpiDevice() constructor in managed code for details
uint8_t bus = (uint8_t)(pThis[ FIELD___i2cBus ].NumericByRef().s4 / 1000);
uint8_t bus = (uint8_t)(pThis[ FIELD___deviceId ].NumericByRef().s4 / 1000);

// Get a complete low-level SPI configuration, depending on user's managed parameters
nfI2CConfig cfg = GetConfig(bus, pThis[ FIELD___connectionSettings ].Dereference());
Expand Down Expand Up @@ -167,14 +174,12 @@ HRESULT Library_win_dev_i2c_native_Windows_Devices_I2c_I2cDevice::NativeTransmit
}
}
i2cReleaseBus(cfg.Driver);
i2cStop(cfg.Driver);

returnStatus = I2cTransferStatus_FullTransfer;
if (i2cStatus != MSG_OK)
{
int errorMask = i2cGetErrors(cfg.Driver);

//TODO: return correct error
//TODO: return correct error status regarding UWP API
returnStatus = I2cTransferStatus_UnknownError;
}

Expand All @@ -194,8 +199,8 @@ HRESULT Library_win_dev_i2c_native_Windows_Devices_I2c_I2cDevice::GetDeviceSelec
{
NANOCLR_HEADER();
{
// declare the device selector string whose max size is "I2C1,I2C2,I2C3," + terminator and init with the terminator
char deviceSelectorString[ 15 + 1] = { 0 };
// declare the device selector string whose max size is "I2C1,I2C2,I2C3,I2C4," + terminator and init with the terminator
char deviceSelectorString[ 20 + 1] = { 0 };

#if STM32_I2C_USE_I2C1
strcat(deviceSelectorString, "I2C1,");
Expand All @@ -206,7 +211,9 @@ HRESULT Library_win_dev_i2c_native_Windows_Devices_I2c_I2cDevice::GetDeviceSelec
#if STM32_I2C_USE_I2C3
strcat(deviceSelectorString, "I2C3,");
#endif

#if STM32_I2C_USE_I2C4
strcat(deviceSelectorString, "I2C4,");
#endif
// replace the last comma with a terminator
deviceSelectorString[hal_strlen_s(deviceSelectorString) - 1] = '\0';

Expand Down