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…, the shipped routing and rows past 16
…pe with every implementation kept
…en by measurement
…e served one from a replay
…st the margin and a graph node
T6's search (job 390) through promote, F4's store plus its 26 records. 16 keep what the deleted decode_gemv configs served, the other 10 the class default.
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Stacked on #1102 (pr-36-t6-fused-draft).
Why
Decode linears on ROCm were routed by three configs (
decode_gemv,decode_gemv_silu_mul,decode_linear) and a chain of passes, each deciding for its own kernel. Nothing put AITER's skinny GEMM, the Triton GEMV and tuned hipBLASLt side by side for one size, and moving a size to another kernel meant editing a different file per kernel.What changed
Stacked on #1102, nothing picked first: the table replaces the decode GEMV configs #1102 added rows 3, 6, 12 and the fc to, and the last commit puts those rows into the table.
KernelChoiceinmstar/kernels/registry.pyreads one per-device table,configs/gfx942/mi325x/decode_gemm.json, which replaces the three configs. Each entry keeps every candidate's time and parameters beside the choice, so moving a size is a one-word edit. A fused gate/up has its owngated1-entry.mstar/platforms/rocm_gemm.py: one pass route for AITER, Triton, tuned hipBLASLt and plain hipBLASLt at rows 1-128 in decode buckets.DecodeLinearPassand the pass chain are gone. The route keys on a bucket's rows, so Speculative decoding on Qwen3.5: a fused draft step and an fp8 draft head #1102's verify buckets (8 rows, 24 tokens) keep their passes. Tuned solutions apply only on the stack they were tuned on.python -m benchmark.kernels.promote decode_gemm --store DIRwrites the table from the harness store. A size leaves what the tree serves only for a 2 % gain and one graph node (a fused gate/up for the 2 % alone): without the node floor a first table moved 2B's rows-1 out_proj to Triton for 0.17 us a call and broke an Inductor fold (247 to 265 kernels a step).skinny_gemm_passes()returns None before any table read, and products without a table keep today's defaults. Docs indocs/kernels.rst.Verification
Not in this PR
Rebased onto main
Rebased onto main (ff7819d, 2026-11-05); the same 9 commits. The MI325X numbers here were measured on the AMD line before its rebase; the rebased line read level on the Qwen3-TTS, Qwen3-Omni, Qwen3.5 mtp2 and FLUX.2 klein smoke rows, and -8.7 % on the Qwen3.5-0.8B text c=64 row, which waits on the twin-slot re-port (phase 2).