[stm32] [dma] [irq] Always inline IRQ handler to reduce IRQ latency #964
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How much can you overclock it before it becomes unstable? Why not use something faster, like the F7/H7? Parts shortage? |
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I have a (Japanese) encoder that needs a 18-bit serial protocol with 2.5 Msps over half-duplex RS485. Frames with 18 bits (1 start bit, 16 data bits, 1 stop bit, 1 to 4 frames) do not fit into U(SART), SPI, et cetera. That is why I use GPIO DMA triggered by a timer. I run a blue pill at 80 MHz to achieve 2.5 Msps (80/2.5 = 32). I already have multiple STM32G474 on my desk and will do some custom hardware asap, but I wanted to test software and constraints before building the board. I need to quickly change from TX to RX. I use the GPIO toggle works quite fine. I successfully read the encoder and can fully interpret the data. Data is protected by a CRC8 and everything works on the STM32F103 (clone?) so far. |
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In case of IRQ for transferComplete is used and halfTransferComplete is not used: HT_Flag is always/mostly set when TC_Flag is set. So checking the flag first is wasting time. In case that TC_Flag is set and halfTransferComplete is used, IRQ latency stays the same with this change.
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As mentioned by @chris-durand in #963
Shaves off 80ns on (slightly overclocked) STM32F107 ...