[board] Nucleo-L496ZG-P #614

rleh · 2021-04-16T00:37:12Z

ST decided to use a different pinout for the Zio/Arduino connectors on this Nucleo-L144 board, see schematic.

The ST-Link serial lines are only connected to LpUart1 which is not yet supported by modm; thus the logger is disabled 😒.
I will have a look at the LpUart in the next days...

rleh · 2021-05-02T15:15:27Z

The LPUART driver is enabled now, but does not work yet on my Nucleo-L496...

salkinium · 2021-05-02T15:38:11Z

Maybe the LPUART requires additional power bit enabled in the RCC? I remember some LP bits in there which are not used by the API yet.

rleh · 2021-05-02T17:10:06Z

I only see the LPUART1SMEN bit in RCC->APB1SMENR2, which is enabled by default and should not make any difference.

salkinium · 2021-05-02T17:29:18Z

Ok, then it's maybe the clock source? RM says something about LSE being used. The LPUARTDIV prescaler is also 19-bits, instead of 16-bits.

Update: No, by default 00 LPUART1 seems to be clocked by PCLK like the other UARTS…

salkinium · 2021-05-02T17:35:28Z

Yeah, baudrate computation has a different scalar of 256 for LPUART:

rleh · 2021-05-08T15:27:20Z

Issue: Uart is on GpioG7/GpioG8, but im unable to even toggle this GPIOs.

Then I found this little nasty detail:

Now I set this bit: PWR->CR2 |= PWR_CR2_IOSV;

But reading back PWR->CR2 always gives zero and gpio port G still does not work...
Any ideas?

chris-durand · 2021-05-08T15:38:14Z

Did you enable the PWREN bit in the RCC APB1ENR1 register? Otherwise the PWR peripheral is not clocked.

EDIT: looked at you branch, does not seem to be enabled.
So, do: RCC->APB1ENR1 |= RCC_APB1ENR1_PWREN

rleh · 2021-05-08T17:50:25Z

src/modm/platform/uart/stm32/uart_hal_impl.hpp.in

+	constexpr auto result = Prescaler::from_range(SystemClock::{{ uart_name ~ id }}, baudrate, 1, max);
+%% elif uart_name == "Lpuart"
+	constexpr uint32_t max = (1ul << 19) - 1ul;
+	constexpr auto result = Prescaler::from_range(SystemClock::{{ uart_name ~ id }} * 256, baudrate / 6, 1, max);


I have no explanation fot this magic /6 factor right now...

Yeah, I was suspicious from the beginning, since the 19-bit - 16-bit = 3-bit, but the scalar is 256 = 8bit, so where do the other 5-bits go? But if this works, meh.

I guess the /6 is not the correct solution, it is just a coincidence. The optimal prescaler for 115200 baud is 0x2b672 (177778), ST's table in the manual says 0x2b671 (177777) for 80 MHz clock. The code in this PR with /6 gives 171881. This looks pretty suspicious, still somehow close but not optimal.

This is an int overflow problem, we are calculating prescalers in 32 bit arithmetic.

>>> (80e6*256)/(2**31 - 1) 9.536743168503392

Oh crap, we should replace the modm::frequency_t and uint32_t with uint64_t in the modm::Prescaler class:
https://github.com/modm-io/modm/blob/develop/src/modm/math/algorithm/prescaler.hpp

We have to be careful, int overflow is evil. This compiles:

static constexpr uint32_t clock = 80'000'000; static constexpr uint64_t clock2 = 80'000'000; static_assert((clock * 256) != (clock2 * 256));

The system clock structs need an update as well.

What do you think about my solution in adbe4da?

-class -Prescaler +template<typename T> +class +GenericPrescaler { // ... // sed s/modm::frequency_t/T/ // ... }; +using Prescaler = GenericPrescaler<modm::frequency_t>;

(except for the typo in the commit message)

It's good, it leaves the option open to use it at runtime with 32-bit, however I would just make it GenericPrescaler<uint64_t>; by default, since we only use it at compile time.

rleh · 2021-05-08T18:37:08Z

The LPUARTDIV prescaler is also 19-bits

Actually 20 bits 😉

salkinium

Yesssssss (for everything but the prescaler issues)

src/modm/platform/uart/stm32/uart_hal_impl.hpp.in

src/modm/math/algorithm/prescaler.hpp

rleh · 2021-05-09T01:40:57Z

Now also shared interrupts of any u(s)art should be supported.
Let's see what the CI thinks about it...

rleh · 2021-05-09T13:33:08Z

Review, then squash and merge?

salkinium

Very nice. Shared IRQs are kinda evil though… looks sternly at ST

examples/nucleo_l496zg-p/blink/main.cpp

src/modm/platform/uart/stm32/uart_hal_impl.hpp.in

rleh added the example 🔑 label Apr 16, 2021

rleh force-pushed the feature/nucleo_l496zg branch from ab2fd1a to 2efdb8a Compare May 2, 2021 15:14

rleh force-pushed the feature/nucleo_l496zg branch from 2efdb8a to b4be026 Compare May 8, 2021 17:40

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[stm32] Enable Vddio2 supply for G0, L4 and L5 families

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rleh force-pushed the feature/nucleo_l496zg branch from a224093 to 347acdd Compare May 9, 2021 01:39

rleh requested a review from salkinium May 9, 2021 01:39

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rleh requested review from salkinium and chris-durand and removed request for salkinium May 9, 2021 13:31

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rleh added 5 commits May 10, 2021 01:57

[driver] Fix missing includes in Touch2046 driver

f98b3ba

[math] More generic prescaler computation class

214d686

[stm32] Enable Lpuart driver

8e40754

[board] Add Nucleo-L496-P

1e12c26

[examples] Nucleo-L496ZG-P: minimal blink example

897579e

rleh removed the ci:hal Triggers the exhaustive HAL compile CI jobs label May 9, 2021

rleh force-pushed the feature/nucleo_l496zg branch from 7f4cc65 to 897579e Compare May 9, 2021 23:57

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salkinium merged commit 897579e into modm-io:develop May 10, 2021

rleh deleted the feature/nucleo_l496zg branch May 10, 2021 23:23

salkinium added this to the 2021q2 milestone Jun 20, 2021

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[board] Nucleo-L496ZG-P #614

[board] Nucleo-L496ZG-P #614

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[board] Nucleo-L496ZG-P #614

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