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STM32 FDCAN: Get all messages from FIFO in RX ISR #1017
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ser-plu
commented
May 9, 2023
- In cases, when a new message comes during RX ISR execution, it would not be processed until a next message arrives. Critical for request-response protocols.
- The header file missed a dependency
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Thanks for bringing this up!
I had noticed this code might be buggy when I wrote the SAM MCAN driver (based on this driver), but then forgot about it.
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Nice idea. I will add this tomorrow, as I have already left my workplace.
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I implemented @chris-durand|s idea and also added a commit that fixes the fdcan unit test (see #1013). |
... but not with the modification (7bede35) that actually triggers our corner case:
WTF? |
I changed the code to use ILE register and adjusted the IRQ disable logic. |
@rleh The modified
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I fixed the CAN tests as well |
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@salkinium What's wrong with the CI now? Click to view log
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Wow, impressive. Maybe the NSA guy assigned to us got annoyed by all the dots, who knows… Multiprocessing in Python is just utterly broken. It's an underlying issue of fork() vs. globals initialization, that cannot really be fixed. You can replace it with Threadpool + subprocess.run, which effectively does the same, but with a controlled entry point back into the script and thus properly initialized globals. |
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Running the hardware unit test still fails. I'm currently investigating the issue. |
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I have found some issues with the TX handling. |
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(There's still a race-condition in the docs generator deduplication code, I'll look at it on Sunday) |
Ok, I've fixed the docs generator, the PR now needs to be rebased and squashed. |
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