[clock] Fix multicore us clock reading on RP2040 #1010
Merged
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When using the microsecond clock from both Core0 and Core1, the interrupt semaphore was accessed by both, which broke the overflow detection and caused jitters of up to 1ms.
This gives each core its own flag.
Add 64-bit timer as alternativetoo much effort, cannot be botheredFixes #907. cc @cocasema