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[core] Split module into Cortex-M and STM32 modules
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This moves STM32 specific code from the `:platform:cortex-m` module
into the `:platform:core` module including:

 - linkerscript selection
 - memory region pruning
 - pre-startup code
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salkinium committed Feb 28, 2019
1 parent 42bc6ce commit fb8ad54
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Showing 17 changed files with 247 additions and 194 deletions.
2 changes: 1 addition & 1 deletion docs/src/how-modm-works.md
Original file line number Diff line number Diff line change
Expand Up @@ -347,7 +347,7 @@ sensible default size for its purpose.
```
$ lbuild discover-module-options
...
modm:platform:core:main_stack_size = 3040 [256 ... 65536]
modm:platform:cortex-m:main_stack_size = 3040 [256 ... 65536]
Minimum size of the application main stack
...
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11 changes: 5 additions & 6 deletions src/modm/board/disco_f469ni/board.xml
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Expand Up @@ -7,15 +7,14 @@

<options>
<option name="modm:target">stm32f469nih</option>

<option name="modm:platform:uart:3:buffer.tx">2048</option>
<option name="modm:platform:core:allocator">tlsf</option>
<option name="modm:platform:cortex-m:allocator">tlsf</option>
<option name="modm:tlsf:minimum_pool_size">16777216</option>

<option name="modm:platform:core:linkerscript.memory">
<option name="modm:platform:cortex-m:linkerscript.memory">
SDRAM (rwx) : ORIGIN = 0xC0000000, LENGTH = 16M
</option>
<option name="modm:platform:core:linkerscript.sections">
<option name="modm:platform:cortex-m:linkerscript.sections">
.sdramdata :
{
__sdramdata_load = LOADADDR (.sdramdata); /* address in FLASH */
Expand All @@ -34,12 +33,12 @@
__heap_extern_end = .;
} >SDRAM
</option>
<option name="modm:platform:core:linkerscript.table_extern.copy">
<option name="modm:platform:cortex-m:linkerscript.table_extern.copy">
LONG (__sdramdata_load)
LONG (__sdramdata_start)
LONG (__sdramdata_end)
</option>
<option name="modm:platform:core:linkerscript.table_extern.heap">
<option name="modm:platform:cortex-m:linkerscript.table_extern.heap">
LONG (0x801f)
LONG (__heap_extern_start)
LONG (__heap_extern_end)
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4 changes: 2 additions & 2 deletions src/modm/board/nucleo_f031k6/board.xml
Original file line number Diff line number Diff line change
Expand Up @@ -9,8 +9,8 @@
<option name="modm:target">stm32f031k6t</option>

<option name="modm:platform:uart:1:buffer.tx">256</option>
<option name="modm:platform:core:main_stack_size">992</option>
<option name="modm:platform:core:allocator">block</option>
<option name="modm:platform:cortex-m:main_stack_size">992</option>
<option name="modm:platform:cortex-m:allocator">block</option>
</options>
<modules>
<module>modm:board:nucleo-f031k6</module>
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4 changes: 2 additions & 2 deletions src/modm/board/nucleo_f042k6/board.xml
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Expand Up @@ -8,8 +8,8 @@
<options>
<option name="modm:target">stm32f042k6t</option>
<option name="modm:platform:uart:2:buffer.tx">256</option>
<option name="modm:platform:core:main_stack_size">992</option>
<option name="modm:platform:core:allocator">block</option>
<option name="modm:platform:cortex-m:main_stack_size">992</option>
<option name="modm:platform:cortex-m:allocator">block</option>
</options>
<modules>
<module>modm:board:nucleo-f042k6</module>
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Original file line number Diff line number Diff line change
Expand Up @@ -21,7 +21,7 @@ MEMORY
{{ memory.name | upper }} ({{ memory.access }}) : ORIGIN = {{ memory.start }}, LENGTH = {{ memory.size }}
%% endfor
RAM (rwx) : ORIGIN = 0x{{ "%08x" % ram_origin }}, LENGTH = {{ ram_size }}
{{ options["linkerscript.memory"] }}
{{ options[":platform:cortex-m:linkerscript.memory"] }}
}

OUTPUT_FORMAT("elf32-littlearm")
Expand All @@ -33,7 +33,7 @@ ENTRY(Reset_Handler)
/* the thread stack is used only for reporting hard fault conditions! It may therefore be small. */
PROCESS_STACK_SIZE = {{ process_stack_size }};
/* the handler stack is used for main program as well as interrupts */
MAIN_STACK_SIZE = {{ options.main_stack_size }};
MAIN_STACK_SIZE = {{ options[":platform:cortex-m:main_stack_size"] }};
/* combined stack size */
TOTAL_STACK_SIZE = MAIN_STACK_SIZE + PROCESS_STACK_SIZE;
%% endmacro
Expand Down Expand Up @@ -125,14 +125,14 @@ TOTAL_STACK_SIZE = MAIN_STACK_SIZE + PROCESS_STACK_SIZE;
.table.zero.extern : ALIGN(4)
{
__table_zero_extern_start = .;
{{ options["linkerscript.table_extern.zero"] }}
{{ options[":platform:cortex-m:linkerscript.table_extern.zero"] }}
__table_zero_extern_end = .;
} >FLASH

.table.copy.extern : ALIGN(4)
{
__table_copy_extern_start = .;
{{ options["linkerscript.table_extern.copy"] }}
{{ options[":platform:cortex-m:linkerscript.table_extern.copy"] }}
__table_copy_extern_end = .;
} >FLASH
%% endmacro
Expand Down Expand Up @@ -161,7 +161,7 @@ TOTAL_STACK_SIZE = MAIN_STACK_SIZE + PROCESS_STACK_SIZE;
LONG(__{{ section.name }}_start)
LONG(__{{ section.name }}_end)
%% endfor
{{ options["linkerscript.table_extern.heap"] }}
{{ options[":platform:cortex-m:linkerscript.table_extern.heap"] }}
__table_heap_end = .;
} >FLASH
%% endmacro
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163 changes: 92 additions & 71 deletions src/modm/platform/core/cortex/module.lb
Original file line number Diff line number Diff line change
Expand Up @@ -11,10 +11,85 @@
# file, You can obtain one at http://mozilla.org/MPL/2.0/.
# -----------------------------------------------------------------------------

import os
def common_vector_table_location(env):
return env.get(":platform:cortex-m:vector_table_location", "rom")

def common_vector_table(env):
"""
Computes vector table properties:
- vector_table: [position] = Full vector name (ie. *with* _Handler or _IRQHandler suffix)
- vector_table_location: rom or ram
- highest_irq: highest IRQ number + 1
- core: cortex-m{0,3,4,7}{,+,f,fd}
The system vectors start at -16, so you must add 16 to `highest_irq` to get
the total number of vectors in the table!
:returns: a dictionary of vector table properties
"""
device = env[":target"]
driver = device.get_driver("core")
core = driver["type"]

# Add common ARM Cortex-M exceptions
interrupts = {
-15: "Reset_Handler",
-14: "NMI_Handler",
-13: "HardFault_Handler",
-5: "SVC_Handler",
-2: "PendSV_Handler",
-1: "SysTick_Handler"
}
# The fault and debug handlers are ARMv7-M only
if "m0" not in core:
interrupts.update({
-12: "MemManage_Handler",
-11: "BusFault_Handler",
-10: "UsageFault_Handler",
-4: "DebugMon_Handler"
})
# Append `_IRQHandler` to all
for vector in driver["vector"]:
interrupts[int(vector["position"])] = vector["name"] + "_IRQHandler"

properties = {
"core": core,
"vector_table_location": common_vector_table_location(env),
"vector_table": interrupts,
"highest_irq": max(interrupts.keys()) + 1,
}
return properties


def common_memories(env):
"""
Computes memory properties:
- memories: unfiltered memory regions
- regions: memory region names
- ram_origin: Lowest SRAM origin address
- ram_origin: Total size of all SRAM regions
- process_stack_size: requested process stack
- vector_table_location: ram or rom
:returns: dictionary of memory properties
"""
device = env[":target"]
memories = listify(device.get_driver("core")["memory"])
process_stack_size = 0
if env.get(":platform:fault.cortex:led", "disabled") == "disabled":
process_stack_size = 32
properties = {
"memories": memories,
"regions": [m["name"] for m in memories],
"ram_origin": min(int(m["start"], 16) for m in memories if "sram" in m["name"]),
"ram_size": sum(int(m["size"]) for m in memories if "sram" in m["name"]),
"process_stack_size": process_stack_size,
"vector_table_location": common_vector_table_location(env),
}
return properties

def init(module):
module.name = "core"
module.name = "cortex-m"
module.parent = "platform"
module.description = FileReader("module.md")

Expand Down Expand Up @@ -47,6 +122,15 @@ def prepare(module, options):
enumeration=["newlib", "block", "tlsf"],
default="newlib",
dependencies=lambda value: ":tlsf" if value == "tlsf" else None))
module.add_option(
NumericOption(
name="main_stack_size",
description=FileReader("option/main_stack_size.md"),
minimum=2 ** 8,
maximum=2 ** 16,
default=2 ** 10 * 3 - 32))

# Cortex-M0 does not have remappable vector table, so it will remain in Flash
if not options[":target"].has_driver("core:cortex-m0*"):
memories = listify(options[":target"].get_driver("core")["memory"])
default_location = "rom"
Expand All @@ -58,13 +142,6 @@ def prepare(module, options):
description=FileReader("option/vector_table_location.md"),
enumeration=["rom", "ram"],
default=default_location))
module.add_option(
NumericOption(
name="main_stack_size",
description=FileReader("option/main_stack_size.md"),
minimum=2 ** 8,
maximum=2 ** 16,
default=2 ** 10 * 3 - 32))

module.add_option(
StringOption(
Expand Down Expand Up @@ -92,71 +169,15 @@ def prepare(module, options):
description="",
default=""))

module.add_query(
EnvironmentQuery(name="vector_table", factory=common_vector_table))
module.add_query(
EnvironmentQuery(name="memories", factory=common_memories))

return True

def build(env):
device = env[":target"]
driver = device.get_driver("core")

properties = device.properties
properties["target"] = target = device.identifier
properties["driver"] = driver
# Cortex-M0 does not have remappable vector table, so it will remain in Flash
properties["vector_table_location"] = env.get("vector_table_location", "rom")
properties["core"] = driver["type"]
properties["process_stack_size"] = 0
if env.get(":platform:fault.cortex:led", None):
properties["process_stack_size"] = 32

# Add ARM Cortex-M exceptions
interrupts = {
-15: "Reset_Handler",
-14: "NMI_Handler",
-13: "HardFault_Handler",
-5: "SVC_Handler",
-2: "PendSV_Handler",
-1: "SysTick_Handler"
}
if properties["core"] != "cortex-m0":
interrupts.update({
-12: "MemManage_Handler",
-11: "BusFault_Handler",
-10: "UsageFault_Handler",
-4: "DebugMon_Handler"
})
# Append `_IRQHandler` to all
for vector in driver["vector"]:
interrupts[int(vector["position"])] = vector["name"] + "_IRQHandler"

memories = [m for m in listify(driver["memory"]) if m["name"] != "backup"]
properties.update({
"interrupt_table": interrupts,
"number_of_interrupts": max(interrupts.keys()) + 1,
"memories": memories,
"regions": [m["name"] for m in memories],
"ram_origin": min(int(m["start"], 16) for m in memories if "sram" in m["name"]),
"ram_size": sum(int(m["size"]) for m in memories if "sram" in m["name"]),
})
if target["family"] in ["l4"]: # FIXME!
properties["regions"].remove("sram2")

linkerscript = "ram"
for memory in memories:
if memory["name"] == "ccm":
if "x" in memory["access"]:
# Executable CCM (Instruction Core-Coupled Memory)
linkerscript = "iccm"
else:
# Non-executable CCM (Data Core-Coupled Memory)
linkerscript = "dccm"
elif memory["name"] == "dtcm":
# Executable ITCM and DTCM (Tightly-Coupled Memory)
linkerscript = "idtcm"

env.substitutions = properties
env.outbasepath = "modm/link"
env.template("linkerscript/stm32_{}.ld.in".format(linkerscript), "linkerscript.ld")

env.substitutions = env.query("vector_table")
env.outbasepath = "modm/src/modm/platform/core"

# dealing with runtime assertions
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65 changes: 0 additions & 65 deletions src/modm/platform/core/cortex/platform.macros

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