[wip] Trying to get USB to work on STM32F469-DISCO

examples/stm32f469_discovery/usb/main.cpp

@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2011, Fabian Greif
+ * Copyright (c) 2013, Kevin Läufer
+ * Copyright (c) 2013-2017, Niklas Hauser
+ * Copyright (c) 2014, Sascha Schade
+ *
+ * This file is part of the modm project.
+ *
+ * This Source Code Form is subject to the terms of the Mozilla Public
+ * License, v. 2.0. If a copy of the MPL was not distributed with this
+ * file, You can obtain one at http://mozilla.org/MPL/2.0/.
+ */
+// ----------------------------------------------------------------------------
+
+#include <modm/board.hpp>
+#include <modm/processing.hpp>
+#include <tusb.h>
+#include <modm/io.hpp>
+
+using namespace Board;
+using UsbIoDevice = modm::IODeviceWrapper<UsbUart<0>, modm::IOBuffer::DiscardIfFull>;
+
+// ----------------------------------------------------------------------------
+int
+main()
+{
+	Board::initialize();
+
+	Board::usb::VBus::setInput();
+	Board::usb::Dp::Dp<Peripheral::Usbotgfs>::connect();
+	Board::usb::Dm::Dm<Peripheral::Usbotgfs>::connect();
+	Board::usb::Id::Id<Peripheral::Usbotgfs>::connect();
+
+	Rcc::enable<Peripheral::Usbotgfs>();
+	USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBDEN;
+	// USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS;
+ //  	USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSBSEN;
+ //  	USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSASEN;
+	tusb_init();
+
+	UsbIoDevice usb_io_device;
+	modm::IOStream usb_stream(usb_io_device);
+
+	modm::PeriodicTimer tmr{1s};
+
+	while (true)
+	{
+		tud_task();
+
+		if (tmr.execute())
+		{
+			MODM_LOG_INFO << "Hello from Serial" << modm::endl;
+			usb_stream << "Hello from USB" << modm::endl;
+		}
+	}
+
+	return 0;
+}

examples/stm32f469_discovery/usb/project.xml

@@ -0,0 +1,12 @@
+<library>
+  <extends>modm:disco-f469ni</extends>
+  <options>
+    <option name="modm:build:build.path">../../../build/stm32f469_discovery/blink</option>
+  </options>
+  <modules>
+    <module>modm:platform:gpio</module>
+    <module>modm:processing:timer</module>
+    <module>modm:tinyusb:device:cdc</module>
+    <module>modm:build:scons</module>
+  </modules>
+</library>

src/modm/board/disco_f469ni/board.hpp

@@ -79,14 +79,17 @@ struct SystemClock
 	static constexpr uint32_t Timer13 = Apb1Timer;
 	static constexpr uint32_t Timer14 = Apb1Timer;
 
+	static constexpr uint32_t Usb = 48_MHz;
+
 	static bool inline
 	enable()
 	{
 		Rcc::enableExternalCrystal(); // 8 MHz
 		const Rcc::PllFactors pllFactors{
 			.pllM = 8,		// 8MHz / M=8 -> 1MHz   !!! Must be 1 MHz for PLLSAI !!!
 			.pllN = 360,	// 1MHz * N=360 -> 360MHz
-			.pllP = 2		// 360MHz / P=2 -> 180MHz = F_cpu
+			.pllP = 2,		// 360MHz / P=2 -> 180MHz = F_cpu
+			.pllQ = 15,
 		};
 		Rcc::enablePll(Rcc::PllSource::ExternalCrystal, pllFactors);
 		PWR->CR |= PWR_CR_ODEN; // Enable overdrive mode
@@ -97,6 +100,22 @@ struct SystemClock
 		Rcc::setApb2Prescaler(Rcc::Apb2Prescaler::Div2);
 		Rcc::updateCoreFrequency<Frequency>();
 
+		{
+			// LCD clock configuration
+			// PLLSAI_VCO Input = HSE_VALUE/PLL_M = 1 Mhz
+			// PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN = 384 Mhz
+			// PLLLCDCLK = PLLSAI_VCO Output/PLLSAIR = 384 MHz / 7 = 54.857 MHz
+			// LTDC clock frequency = PLLLCDCLK / LTDC_PLLSAI_DIVR_2 = 54.857 MHz / 2 = 27.429 MHz
+			RCC->PLLSAICFGR = (7 << 28) | (15 << 24) | (3 << 16) | (384 << 6);
+			// Select PLLSAI clock for 48MHz clocks
+			RCC->DCKCFGR = RCC_DCKCFGR_CK48MSEL;
+			// Enable PLLSAI
+			RCC->CR |= RCC_CR_PLLSAION;
+			for (int t = 1'024; not (RCC->CR & RCC_CR_PLLSAIRDY) and t; t--) {
+				modm::delay_ms(1);
+			}
+		}
+
 		return true;
 	}
 };
@@ -148,6 +167,14 @@ using I2cMaster = I2cMaster1;
 using Touch = modm::Ft6x06< I2cMaster >;
 }
 
+namespace usb
+{
+using VBus = GpioA9;
+using Id = GpioA10;
+using Dm = GpioA11;
+using Dp = GpioA12;
+}
+
 namespace stlink
 {
 using Tx = GpioOutputB10;		// STLK_RX [STLINK V2-1_U2_RX]: USART3_TX

src/modm/board/disco_f469ni/board_dsi.cpp

@@ -119,6 +119,7 @@ board_initialize_display(uint8_t ColorCoding)
 		DSI->WCR = DSI_WCR_DSIEN;
 	}
 
+	/*
 	{
 		// LCD clock configuration
 		// PLLSAI_VCO Input = HSE_VALUE/PLL_M = 1 Mhz
@@ -134,6 +135,7 @@ board_initialize_display(uint8_t ColorCoding)
 			modm::delay_ms(1);
 		}
 	}
+	*/
 
 	{
 		// HAL_LTDC_Init(&hltdc_eval);

src/modm/platform/clock/stm32/module.lb

@@ -78,7 +78,7 @@ def build(env):
 
     all_peripherals = set()
     all_drivers = [d for d in device._properties["driver"] if d["name"] not in ["gpio", "core"]]
-    translate = lambda s: "".join(p.capitalize() for p in s.split("_"))
+    translate = lambda s: s.replace("_", "").capitalize()
     for d in all_drivers:
         dname = translate(d["name"])
         if "instance" in d:
@@ -90,6 +90,7 @@ def build(env):
     rcc_map = env.query(":cmsis:device:rcc-map")
     rcc_enable = {}
     rcc_reset = {}
+    # print(all_peripherals)
 
     for per, mode in rcc_map.items():
         nper = per
@@ -107,13 +108,20 @@ def build(env):
             nper = "DSI"
         if "Eth" in all_peripherals and per == "ETHMAC":
             per = "Eth"
+        # Fix USBOTG OTG
+        if "Usbotgfs" in all_peripherals and per.startswith("OTG"):
+            if per == "OTGH": per = "OTGHS";
+            per = "USB"+per
+            # print(per, mode)
         if per.capitalize() not in all_peripherals:
             continue
         if "EN" in mode:
             rcc_enable[per.capitalize()] = (nper, mode["EN"])
         if "RST" in mode:
             rcc_reset[nper] = mode["RST"]
 
+    # print(rcc_enable)
+    # print(rcc_reset)
     env.substitutions.update({
         "rcc_enable": rcc_enable,
         "rcc_reset": rcc_reset,

src/modm/platform/clock/stm32/rcc.cpp.in

@@ -161,7 +161,7 @@ modm::platform::Rcc::enablePll(PllSource source, const PllFactors& pllFactors, u
 	tmp |= (((uint32_t) (pllFactors.pllP / 2) - 1) << RCC_PLLCFGR_PLLP_Pos) & RCC_PLLCFGR_PLLP;
 
 	// PLLQ (24) divider for USB frequency; (0-15)
-	// tmp |= (((uint32_t) pllQ) << RCC_PLLCFGR_PLLQ_Pos) & RCC_PLLCFGR_PLLQ;
+	tmp |= (((uint32_t) pllFactors.pllQ) << RCC_PLLCFGR_PLLQ_Pos) & RCC_PLLCFGR_PLLQ;
 
 	RCC->PLLCFGR = tmp;
 
@@ -201,9 +201,9 @@ modm::platform::Rcc::enablePll(PllSource source, const PllFactors& pllFactors, u
 %% else
 	tmp |= ((uint32_t(pllFactors.pllR / 2) - 1) << RCC_PLLCFGR_PLLR_Pos) & RCC_PLLCFGR_PLLR;
 	// PLLQ (21) divider for USB frequency; (00: PLLQ = 2, 01: PLLQ = 4, etc.)
-	// tmp |= (((uint32_t) (pllQ / 2) - 1) << RCC_PLLCFGR_PLLQ_Pos) & RCC_PLLCFGR_PLLQ;
+	tmp |= (((uint32_t) (pllFactors.pllQ / 2) - 1) << RCC_PLLCFGR_PLLQ_Pos) & RCC_PLLCFGR_PLLQ;
 	// enable pll USB clock output
-	// tmp |= RCC_PLLCFGR_PLLQEN;
+	tmp |= RCC_PLLCFGR_PLLQEN;
 %% endif
 
 	// enable pll CPU clock output

src/modm/platform/clock/stm32/rcc.hpp.in

@@ -368,6 +368,7 @@ public:
  %% else
 		const uint8_t pllP;
  %% endif
+ 		const uint8_t pllQ;
 %% elif target["family"] in ["l1"]
 		const PllMultiplier pllMul;
 		const uint8_t pllDiv;
@@ -445,6 +446,7 @@ public:
 %% else
 			  .pllP = pllP,
 %% endif
+			.pllQ = 0,
 		};
 		return enablePll(source, pllFactors, waitCycles);
 	}

src/modm/platform/gpio/stm32/module.lb

@@ -27,10 +27,10 @@ def port_ranges(gpios):
     return ports
 
 def translate(s):
-    name = ""
-    for part in s.split("_"):
-        name += part.capitalize()
-    return name
+    # name = ""
+    # for part in s.split("_"):
+    #     name += part#.capitalize()
+    return s.replace("_", "").capitalize()
 
 def get_driver(s):
     name = "None"