SAM: Adds OSC8M clock source and fixes DFLL 48Mhz operation

modm-io · Jul 8, 2020 · 11e3e15 · 11e3e15
1 parent 9621cb5
commit 11e3e15
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/src/modm/platform/clock/sam/gclk.cpp.in b/src/modm/platform/clock/sam/gclk.cpp.in
@@ -44,7 +44,7 @@ modm::platform::GenericClockController::initExternalCrystal(
   // separate call, as described in chapter 15.6.3
   SYSCTRL->XOSC32K.bit.ENABLE = 1;
   while (!SYSCTRL->PCLKSR.bit.XOSC32KRDY and --waitCycles);
-  
+
   // Write Generic Clock Generator configuration
   GCLK->GENCTRL.reg =
       GCLK_GENCTRL_ID(uint32_t(ClockGenerator::ExternalCrystal32K)) |
@@ -68,7 +68,7 @@ modm::platform::GenericClockController::initDFLL48MHz(
       GCLK_CLKCTRL_CLKEN;
   // Wait for synchronization.
   while (GCLK->STATUS.bit.SYNCBUSY and --waitCycles);
-  
+
   // Errata 1.2.1: Disable the OnDemand mode
   SYSCTRL->DFLLCTRL.bit.ONDEMAND = 0;
   // Wait for synchronization.