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8 changes: 8 additions & 0 deletions llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1380,6 +1380,14 @@ RISCVTTIImpl::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
TTI::TargetCostKind CostKind) const {
auto *RetTy = ICA.getReturnType();
switch (ICA.getID()) {
case Intrinsic::vp_load:
case Intrinsic::vp_store: {
Type *DataTy = ICA.getID() == Intrinsic::vp_store ? ICA.getArgTypes()[0]
: ICA.getReturnType();
if (DataTy && DataTy->isIntOrIntVectorTy(1))
return InstructionCost::getInvalid();
break;
}
case Intrinsic::lrint:
case Intrinsic::llrint:
case Intrinsic::lround:
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11 changes: 11 additions & 0 deletions llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
Original file line number Diff line number Diff line change
Expand Up @@ -978,6 +978,17 @@ define void @store() {
ret void
}

define void @i1_vp_memory() {
; CHECK-LABEL: 'i1_vp_memory'
; CHECK-NEXT: Cost Model: Invalid cost for instruction: %l = call <vscale x 16 x i1> @llvm.vp.load.nxv16i1.p0(ptr undef, <vscale x 16 x i1> undef, i32 undef)
; CHECK-NEXT: Cost Model: Invalid cost for instruction: call void @llvm.vp.store.nxv16i1.p0(<vscale x 16 x i1> undef, ptr undef, <vscale x 16 x i1> undef, i32 undef)
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
%l = call <vscale x 16 x i1> @llvm.vp.load.nxv16i1.p0(ptr undef, <vscale x 16 x i1> undef, i32 undef)
call void @llvm.vp.store.nxv16i1.p0(<vscale x 16 x i1> undef, ptr undef, <vscale x 16 x i1> undef, i32 undef)
ret void
}

define void @gather() {
; ARGBASED-LABEL: 'gather'
; ARGBASED-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = call <2 x i8> @llvm.vp.gather.v2i8.v2p0(<2 x ptr> poison, <2 x i1> poison, i32 poison)
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