dcp: make head-sliced attention views contiguous for the B12X PCIe pool - #81
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No actionable comments were generated in the recent review. 🎉 ℹ️ Recent review info⚙️ Run configurationConfiguration used: Organization UI Review profile: CHILL Plan: Pro Plus Run ID: 📒 Files selected for processing (2)
📝 WalkthroughWalkthroughThe B12X PCIe DCP LSE reduction path now makes non-contiguous attention output and LSE views contiguous before dispatch. A CUDA-only test constructs non-contiguous slices and verifies the pool receives contiguous tensors. ChangesB12X LSE contiguity handling
Estimated code review effort: 2 (Simple) | ~10 minutes 🚥 Pre-merge checks | ✅ 5✅ Passed checks (5 passed)
✨ Finishing Touches📝 Generate docstrings
🧪 Generate unit tests (beta)
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E2E verified on the exact failing config — v6 image (
Martin's build patch |
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Sparse MLA backends can return the decode output and LSE as head-sliced views: GLM TP6 virtual-TP pads 64 -> 66 attention heads, the B12X sparse kernel pads its head dim further and slices the result back (b12x_mla_sparse lse = lse[:, :input_num_heads]), which is non-contiguous whenever the kernel head count exceeds the input head count. The B12X PCIe DCP pool validates contiguity, so TP6 + DCP>1 with the A2A fast path died at CUDA graph capture with 'partial_lse must be contiguous'. TP8 shapes never hit this because kernel and input head counts match. Copy the operands to contiguous in _try_b12x_dcp_lse_reduce, after the cheap reject checks so NCCL fallback paths pay nothing. The NCCL packers take explicit strides and never needed this; the query all-gather wrapper already does the same for its input. The LSE copy is [B, H] fp32 and the output copy only happens on padded head counts. Diagnosed by Martin on TP6/MXFP4/A8/DCP2 (v6 image); unit test simulates the sliced-view pattern and asserts the pool receives contiguous tensors. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
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Rebased to a single commit on current Still needed: dev has no equivalent fix — the sparse-MLA head-sliced LSE views reach the PCIe pool non-contiguous on TP6×DCP≥2 and capture dies with |
Problem
TP6 + DCP>1 with the B12X A2A fast path dies at CUDA graph capture:
Root cause: GLM TP6 virtual-TP pads attention heads 64 → 66, and the B12X sparse MLA kernel pads its head dim further, returning the decode output/LSE as head-sliced views (
b12x_mla_sparse.py: lse = lse[:, :input_num_heads]) — non-contiguous whenever kernel head count > input head count. TP8 shapes never hit this (counts match), which is why all DCP2/DCP4 runs to date were fine. The NCCL packers take explicit stride arguments and the query all-gather wrapper already calls.contiguous(); only the PCIe pool's lse-reduce entry lacked the fix-up.Fix
Copy the operands to contiguous in
_try_b12x_dcp_lse_reduce, placed after the cheap reject checks so NCCL fallback paths pay nothing. The LSE copy is a tiny [B, H] fp32; the output copy only happens on padded head counts. Graph-capture safe (same in-graph allocation pattern as the packed A2A send/recv buffers).Matches the minimal patch Martin drafted (
blackwell-llm-docker/patches/vllm-dcp-b12x-contiguous-lse-20260707.patch) — this PR adds the placement inside the try-helper plus a unit test that simulates the sliced-view pattern and asserts the pool receives contiguous tensors (31/31 intest_dcp_a2a.pyon the v6 image, distributed cases deselected).Verification
Diagnosed on TP6/MXFP4/A8/DCP2, v6 image (
vllm49bed029-b12x26144c0): previously died at capture; E2E with this file mounted boots and serves (numbers in comment below).Stacked on
fable/w4a8mx-qmma-pad-20260707(#80) — the v6 image pin.🤖 Generated with Claude Code
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