perf(glm5next): split target and recurrent cache pages - #535
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Allow GLM-5.3 align-mode serving to retain independent physical page sizes for the target MLA cache and recurrent GDN state. Validate the requested token geometry, keep scheduler-visible block sizes compatible, and align the block-outermost pool stride to the packed C4 index-page unit. The split layout is opt-in through VLLM_GLM53_SPLIT_TARGET_BLOCK_SIZE. Other architectures and the generic hybrid cache planner are unchanged. Assisted-by: OpenAI Codex Signed-off-by: Martin Vit <martin@voipmonitor.org>
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📝 WalkthroughWalkthroughThe change adds environment-controlled GLM-5.3 split-cache sizing. It validates block-size settings, preserves MLA and recurrent-state page geometries, aligns pool stride calculations to the C4 index-page size, and adds test coverage. ChangesGLM-5.3 split cache
Estimated code review effort: 3 (Moderate) | ~20 minutes Merge Risk: 🔵 Low · up to The PR adds opt-in split-cache allocation for GLM-5.3, but the associated C4 stride padding can also affect unrelated configurations when the environment variable is inherited, potentially reducing cache capacity or causing startup sizing failures. The change is otherwise mergeable with explicit owner follow-up to scope padding to validated GLM-5.3 split-cache use. Sequence Diagram(s)sequenceDiagram
participant PlatformConfig
participant CacheGroupBuilder
participant PoolStrideCalculator
PlatformConfig->>PlatformConfig: validate split block-size environment settings
PlatformConfig->>CacheGroupBuilder: apply target and Mamba block sizes
CacheGroupBuilder->>CacheGroupBuilder: preserve MLA and recurrent-state page sizes
CacheGroupBuilder->>PoolStrideCalculator: calculate bytes per block
PoolStrideCalculator-->>CacheGroupBuilder: return C4-index-page-aligned stride
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Inline comments:
In `@vllm/v1/core/kv_cache_utils.py`:
- Around line 1297-1303: Restrict the C4 stride-padding block in the KV-cache
sizing logic to GLM-5.3 MLA cache specifications, rather than checking
VLLM_GLM53_SPLIT_TARGET_BLOCK_SIZE alone. Reuse the existing cache-spec/model
identification symbols to ensure non-hybrid models do not round bytes_per_block,
while preserving the current 64×132-byte alignment for eligible GLM-5.3
split-cache groups.
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Apply the 64-by-132-byte C4 stride alignment only when the cache groups contain a GLM-5.3 target MLA specification. An inherited split-cache environment variable therefore cannot reduce cache capacity for unrelated models. Reuse the same model predicate for split-cache grouping and cover non-GLM MLA groups with a regression test. Signed-off-by: Martin Vit <martin@voipmonitor.org>
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perf/glm53-flashkda-dflash-prefill
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Purpose and status
Status: implemented and qualified for opt-in GLM-5.3 align-mode serving.
GLM-5.3 stores sparse MLA KV and gated-delta recurrent state in independent
physical allocations. The generic hybrid-page alignment promotes the target
MLA block from 256 to 2304 tokens so one MLA page can contain a GDN state page.
That promotion is unnecessary for the block-outermost cache layout and makes
the packed C4 and GDN prefill kernels operate on an inefficient token geometry.
This pull request adds an explicit split-page contract:
VLLM_GLM53_SPLIT_TARGET_BLOCK_SIZEselects the target MLA token block;VLLM_GLM53_SPLIT_MAMBA_BLOCK_SIZEindependently selects the recurrent-statetoken block and must be a multiple of the target block;
Glm5NextForConditionalGenerationandmamba_cache_mode=align;model-owned C4 page tails remain correctly addressed.
Other architectures and servers that do not set the environment variable use
the existing hybrid cache planner unchanged.
Compatibility and capacity
The qualified setting is target 512 tokens and recurrent state 512 tokens.
The MTP3 DCP1 server retained 1,265,215 local KV tokens, or 4.83 concurrent
262,144-token requests. The automatic 2304-token unified layout reported
4,412,757 tokens. The lower capacity is an explicit opt-in tradeoff caused by
retaining independent group allocations; the configured 262,144-token model
length remains supported.
Performance evidence
Hardware was four stock-clock NVIDIA RTX PRO 6000 Blackwell Workstation
Edition GPUs (physical devices 4-7), TP4/DCP1, B12X target attention, B12X
NVFP4 W4A4 MoE, B12X linear kernels and PCIe all-reduce, FlashKDA prefill,
MTP3 with B12X attention and Humming MoE, full CUDA graphs, FP8 target KV,
max_num_batched_tokens=4096, and an exact 32,770-token cold prompt. Each rowis the median of three runs.
The 512/512 geometry is 30.5% faster than automatic 2304-token alignment and
5.7% faster than retaining a 2048-token recurrent block.
The same 512/512 implementation was also qualified in the complete PR stack:
rank-local target KV selection; and
largest selected-token log-probability delta was 0.01365.
Tests
All pre-commit hooks for the changed files pass, including Ruff and mypy.
The cache-group unit test constructs a 287,232-byte target page and a
1,171,456-byte DFlash recurrent page, verifies that grouping preserves both,
and checks the C4-aligned pool stride. Runtime qualification also covered the
1,122,304-byte MTP recurrent page.
Relationship to open work
This pull request is stacked on #530. PR #533 preserves the replicated DFlash
draft-cache partition under DCP, while this pull request defines independent
physical target and recurrent-state pages. PR #517 consumes the resulting
target cache groups for full-CKV DCP prefill. None of those pull requests
implements split target/GDN page geometry.
AI assistance was used to implement, test, benchmark, and prepare this pull
request. The submitted behavior and evidence were reviewed against the source
and runtime logs by the human submitter.