Add custom combine to lower load <3 x i8> as the more efficient sequence
below:
   ldrb wX, [x0, swiftlang#2]
   ldrh wY, [x0]
   orr wX, wY, wX, lsl swiftlang#16
   fmov s0, wX

At the moment, there are almost no cases in which such vector operations
will be generated automatically. The motivating case is non-power-of-2
SLP vectorization: llvm#77790

Update checks after adding more tests in e7b4ff8

This reverts commit 667b5c1fa2527c2fe756673ea2dad54eeecc3e82.

This reverts commit 109038b.