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[AMDGPU][Scheduler] Restore local spill rejection in occupancy mode #233979

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Merged
ronlieb merged 3 commits into from
Oct 23, 2026
Merged

[AMDGPU][Scheduler] Restore local spill rejection in occupancy mode #233979

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9e63b2b
[AMDGPU][Scheduler] Restore local spill rejection in occupancy mode
leeliu103 Oct 20, 2026
b6e0424
Restore the base scheduling check and update tests
leeliu103 Oct 22, 2026
70f60cb
Update the rematerialization spill test
leeliu103 Oct 22, 2026
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4 changes: 1 addition & 3 deletions llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2245,9 +2245,7 @@ bool ClusteredLowOccStage::shouldRevertScheduling(unsigned WavesAfter) {
}

bool PreRARematStage::shouldRevertScheduling(unsigned WavesAfter) {
// When trying to increase occupancy (TargetOcc == true) the stage manages
// region reverts globally (all or none), so we always return false here.
return !TargetOcc && mayCauseSpilling(WavesAfter);
return mayCauseSpilling(WavesAfter);
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}

bool ILPInitialScheduleStage::shouldRevertScheduling(unsigned WavesAfter) {
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44 changes: 44 additions & 0 deletions llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-spills.mir
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@@ -0,0 +1,44 @@
# RUN: llc -mtriple=amdgpu9.00-amd-amdhsa -start-before=machine-scheduler -stop-after=greedy,2 -verify-machineinstrs -o - %s | FileCheck %s

@arsenm arsenm Oct 21, 2026

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Suggested change
# RUN: llc -mtriple=amdgpu9.00-amd-amdhsa -start-before=machine-scheduler -stop-after=greedy,2 -verify-machineinstrs -o - %s | FileCheck %s
# RUN: llc -mtriple=amdgpu9.00-amd-amdhsa -start-before=machine-scheduler -stop-after=greedy,2 -o - %s | FileCheck %s


# Check that rematerialization for higher occupancy does not introduce spills.

# CHECK-LABEL: name: remat_occupancy_no_spill
# CHECK-NOT: SI_SPILL_

@arsenm arsenm Oct 21, 2026

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Don't use -NOT checks, check what is emitted

# CHECK: S_ENDPGM

--- |
define amdgpu_kernel void @remat_occupancy_no_spill() #0 {
ret void
}

attributes #0 = { "amdgpu-waves-per-eu"="9,10" "amdgpu-num-vgpr"="25" }

@arsenm arsenm Oct 21, 2026

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Don't introduce new uses of amdgpu-num-vgpr, it's in the middle of removal

@leeliu103 leeliu103 Oct 22, 2026

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I’ve addressed all three comments on the regression test. Could you take another look at the test changes, including the expectation updates in machine-scheduler-sink-trivial-remats.mir and machine-scheduler-rematerialization-scoring.mir?

...
---
name: remat_occupancy_no_spill
tracksRegLiveness: true
machineFunctionInfo:
isEntryFunction: true
stackPtrOffsetReg: '$sgpr32'
body: |
bb.0:
successors: %bb.1

S_NOP 0, implicit-def %live16:vreg_512, implicit-def %live5:vreg_160
%loaded:vreg_64 = DS_READ2_B32_gfx9 %live5.sub0, 0, 1, 0, implicit $exec :: (load (s64), align 4, addrspace 3)
%address:vgpr_32 = V_ADD_U32_e64 16, %live5.sub0, 0, implicit $exec

bb.1:
successors: %bb.2

%converted0:vgpr_32 = nofpexcept V_CVT_F32_I32_e32 %loaded.sub0, implicit $exec, implicit $mode
DS_WRITE_B32_gfx9 %live5.sub0, %converted0, 8, 0, implicit $exec :: (store (s32), addrspace 3)

%converted1:vgpr_32 = nofpexcept V_CVT_F32_I32_e32 %loaded.sub1, implicit $exec, implicit $mode
DS_WRITE_B32_gfx9 %live5.sub0, %converted1, 12, 0, implicit $exec :: (store (s32), addrspace 3)
DS_WRITE_B32_gfx9 %address, %loaded.sub0, 0, 0, implicit $exec :: (store (s32), addrspace 3)
DS_WRITE_B32_gfx9 %address, %loaded.sub1, 4, 0, implicit $exec :: (store (s32), addrspace 3)

bb.2:
S_NOP 0, implicit %live16, implicit %live5, implicit %loaded
S_ENDPGM 0
...
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