[NFC] Remove fractional part of costs in maxbandwidth-regpressure.ll#187498
[NFC] Remove fractional part of costs in maxbandwidth-regpressure.ll#187498john-brawn-arm merged 1 commit intollvm:mainfrom
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…test This test is failing on the llvm-clang-x-aarch64 buildbot due to what looks like a difference in rounding behaviour when printing estimated cost per lane. Solve this by removing the fractional part, which is what we've done in the past when this has happened (e.g. commit aeb88f6).
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@llvm/pr-subscribers-llvm-transforms Author: John Brawn (john-brawn-arm) ChangesThis test is failing on the llvm-clang-x-aarch64 buildbot due to what looks like a difference in rounding behaviour when printing estimated cost per lane. Solve this by removing the fractional part, which is what we've done in the past when this has happened (e.g. commit aeb88f6). Full diff: https://github.com/llvm/llvm-project/pull/187498.diff 1 Files Affected:
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/maxbandwidth-regpressure.ll b/llvm/test/Transforms/LoopVectorize/AArch64/maxbandwidth-regpressure.ll
index 2addb840d47b9..4110a680fbb18 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/maxbandwidth-regpressure.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/maxbandwidth-regpressure.ll
@@ -12,19 +12,19 @@ target triple = "aarch64-none-unknown-elf"
define i32 @dotp(ptr %a, ptr %b) #0 {
; CHECK-LABEL: LV: Checking a loop in 'dotp'
;
-; CHECK-NOMAX: Cost for VF vscale x 4: 6 (Estimated cost per lane: 1.5)
+; CHECK-NOMAX: Cost for VF vscale x 4: 6 (Estimated cost per lane: 1.
; CHECK-NOMAX: LV: Selecting VF: vscale x 4.
;
-; CHECK-REGS-VP: Cost for VF vscale x 4: 6 (Estimated cost per lane: 1.5)
-; CHECK-REGS-VP: Cost for VF vscale x 8: 6 (Estimated cost per lane: 0.8)
-; CHECK-REGS-VP: Cost for VF vscale x 16: 5 (Estimated cost per lane: 0.3)
+; CHECK-REGS-VP: Cost for VF vscale x 4: 6 (Estimated cost per lane: 1.
+; CHECK-REGS-VP: Cost for VF vscale x 8: 6 (Estimated cost per lane: 0.
+; CHECK-REGS-VP: Cost for VF vscale x 16: 5 (Estimated cost per lane: 0.
; CHECK-REGS-VP: LV: Selecting VF: vscale x 16.
;
-; CHECK-NOREGS-VP: Cost for VF vscale x 4: 6 (Estimated cost per lane: 1.5)
+; CHECK-NOREGS-VP: Cost for VF vscale x 4: 6 (Estimated cost per lane: 1.
; CHECK-NOREGS-VP: LV(REG): Cost of 4 from 2 spills of Generic::VectorRC
-; CHECK-NOREGS-VP-NEXT: Cost for VF vscale x 8: 14 (Estimated cost per lane: 1.8)
+; CHECK-NOREGS-VP-NEXT: Cost for VF vscale x 8: 14 (Estimated cost per lane: 1.
; CHECK-NOREGS-VP: LV(REG): Cost of 4 from 2 spills of Generic::VectorRC
-; CHECK-NOREGS-VP-NEXT: Cost for VF vscale x 16: 13 (Estimated cost per lane: 0.8)
+; CHECK-NOREGS-VP-NEXT: Cost for VF vscale x 16: 13 (Estimated cost per lane: 0.
; CHECK-NOREGS-VP: LV: Selecting VF: vscale x 16.
entry:
br label %for.body
@@ -52,9 +52,9 @@ for.exit: ; preds = %for.body
; VFs and maximize-bandwidth does nothing.
define void @type_too_small(ptr %a, ptr %b) #0 {
; CHECK-LABEL: LV: Checking a loop in 'type_too_small'
-; CHECK: Cost for VF vscale x 4: 6 (Estimated cost per lane: 1.5)
-; CHECK: Cost for VF vscale x 8: 6 (Estimated cost per lane: 0.8)
-; CHECK: Cost for VF vscale x 16: 6 (Estimated cost per lane: 0.4)
+; CHECK: Cost for VF vscale x 4: 6 (Estimated cost per lane: 1.
+; CHECK: Cost for VF vscale x 8: 6 (Estimated cost per lane: 0.
+; CHECK: Cost for VF vscale x 16: 6 (Estimated cost per lane: 0.
; CHECK: LV: Selecting VF: vscale x 16.
entry:
br label %loop
@@ -80,19 +80,19 @@ exit:
define void @high_pressure(ptr %a, ptr %b) #0 {
; CHECK-LABEL: LV: Checking a loop in 'high_pressure'
;
-; CHECK-NOMAX: Cost for VF vscale x 4: 6 (Estimated cost per lane: 1.5)
+; CHECK-NOMAX: Cost for VF vscale x 4: 6 (Estimated cost per lane: 1.
; CHECK-NOMAX: LV: Selecting VF: vscale x 4.
;
-; CHECK-REGS-VP: Cost for VF vscale x 4: 6 (Estimated cost per lane: 1.5)
-; CHECK-REGS-VP: Cost for VF vscale x 8: 10 (Estimated cost per lane: 1.2)
-; CHECK-REGS-VP: Cost for VF vscale x 16: 21 (Estimated cost per lane: 1.3)
+; CHECK-REGS-VP: Cost for VF vscale x 4: 6 (Estimated cost per lane: 1.
+; CHECK-REGS-VP: Cost for VF vscale x 8: 10 (Estimated cost per lane: 1.
+; CHECK-REGS-VP: Cost for VF vscale x 16: 21 (Estimated cost per lane: 1.
; CHECK-REGS-VP: LV: Selecting VF: vscale x 8.
-; CHECK-NOREGS-VP: Cost for VF vscale x 4: 6 (Estimated cost per lane: 1.5)
+; CHECK-NOREGS-VP: Cost for VF vscale x 4: 6 (Estimated cost per lane: 1.
; CHECK-NOREGS-VP: LV(REG): Cost of 6 from 3 spills of Generic::VectorRC
-; CHECK-NOREGS-VP-NEXT: Cost for VF vscale x 8: 20 (Estimated cost per lane: 2.5)
+; CHECK-NOREGS-VP-NEXT: Cost for VF vscale x 8: 20 (Estimated cost per lane: 2.
; CHECK-NOREGS-VP: LV(REG): Cost of 14 from 7 spills of Generic::VectorRC
-; CHECK-NOREGS-VP-NEXT: Cost for VF vscale x 16: 39 (Estimated cost per lane: 2.4)
+; CHECK-NOREGS-VP-NEXT: Cost for VF vscale x 16: 39 (Estimated cost per lane: 2.
; CHECK-NOREGS-VP: LV: Selecting VF: vscale x 4.
entry:
br label %loop
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boomanaiden154
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Not too familiar with the cost computation here, but could the fractional part actually impact an optimization decision? This sort of behavior seems like it could easily lead to different compilation behavior between platforms.
I'm pretty sure the difference is just in how the value gets rounded to one decimal place when being printed using the "%.1f" format specifier. When comparing costs in LoopVectorizationPlanner::isMoreProfitable instead of doing CostA/WidthA < CostB/WidthB it does CostAWidthB < CostBWidthA to avoid division entirely. |
…lvm#187498) This test is failing on the llvm-clang-x-aarch64 buildbot due to what looks like a difference in rounding behaviour when printing estimated cost per lane. Solve this by removing the fractional part, which is what we've done in the past when this has happened (e.g. commit aeb88f6).
This test is failing on the llvm-clang-x-aarch64 buildbot due to what looks like a difference in rounding behaviour when printing estimated cost per lane. Solve this by removing the fractional part, which is what we've done in the past when this has happened (e.g. commit aeb88f6).