[AMDGPU] Remove extra pipes from load-saddr-offset-imm.ll

[boomanaiden154]

This test uses opt to run instcombin and then pipes that into llc which has its output piped into FileCheck. Before this patch, the test also piped in the source file into llc as well, which caused issues with a downstream test executor that executes the lines in bash. However, these extra pipes don't make sense anyways, so remove them.

[llvmbot]

@llvm/pr-subscribers-backend-amdgpu

Author: Aiden Grossman (boomanaiden154)

Changes

This test uses opt to run instcombin and then pipes that into llc which has its output piped into FileCheck. Before this patch, the test also piped in the source file into llc as well, which caused issues with a downstream test executor that executes the lines in bash. However, these extra pipes don't make sense anyways, so remove them.

---

Full diff: https://github.com/llvm/llvm-project/pull/183874.diff

1 Files Affected:

• (modified) llvm/test/CodeGen/AMDGPU/load-saddr-offset-imm.ll (+4-4)

diff --git a/llvm/test/CodeGen/AMDGPU/load-saddr-offset-imm.ll b/llvm/test/CodeGen/AMDGPU/load-saddr-offset-imm.ll
index fb9ed623db6c3..cc12db451c74b 100644
--- a/llvm/test/CodeGen/AMDGPU/load-saddr-offset-imm.ll
+++ b/llvm/test/CodeGen/AMDGPU/load-saddr-offset-imm.ll
@@ -1,9 +1,9 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
 
-; RUN: opt -passes=instcombine < %s | llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1200  < %s | FileCheck -check-prefixes=GFX12,GFX12-SDAG %s
-; RUN: opt -passes=instcombine < %s | llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1250  < %s | FileCheck -check-prefixes=GFX1250,GFX1250-SDAG %s
-; RUN: opt -passes=instcombine < %s | llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1200  < %s | FileCheck -check-prefixes=GFX12,GFX12-GISEL %s
-; RUN: opt -passes=instcombine < %s | llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1250  < %s | FileCheck -check-prefixes=GFX1250,GFX1250-GISEL %s
+; RUN: opt -passes=instcombine < %s | llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1200  | FileCheck -check-prefixes=GFX12,GFX12-SDAG %s
+; RUN: opt -passes=instcombine < %s | llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1250  | FileCheck -check-prefixes=GFX1250,GFX1250-SDAG %s
+; RUN: opt -passes=instcombine < %s | llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1200 | FileCheck -check-prefixes=GFX12,GFX12-GISEL %s
+; RUN: opt -passes=instcombine < %s | llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1250 | FileCheck -check-prefixes=GFX1250,GFX1250-GISEL %s
 
 ; The address calculation can be simplified and folded because of known bits of mbcnt.
 define amdgpu_ps <2 x float> @global_load_scale_add_foldable_knownbits(ptr addrspace(1) inreg %sbase) {