[lldb][Process/FreeBSDKernelCore] Add riscv64 support

lldb/docs/index.rst

@@ -74,7 +74,7 @@ are welcome:
 * iOS, tvOS, and watchOS device debugging on ARM and AArch64
 * Linux user-space debugging for i386, x86_64, ARM, AArch64, PPC64le, s390x
 * FreeBSD user-space debugging for i386, x86_64, ARM, AArch64, PPC
-* FreeBSD kernel debugging for i386, x86_64, AArch64
+* FreeBSD kernel debugging for i386, x86_64, AArch64, RISCV64
 * NetBSD user-space debugging for i386 and x86_64
 * Windows user-space debugging for i386, x86_64, ARM and AArch64 (*)
 

lldb/source/Plugins/Process/FreeBSDKernel/CMakeLists.txt

@@ -15,6 +15,7 @@ add_lldb_library(lldbPluginProcessFreeBSDKernel PLUGIN
   ProcessFreeBSDKernel.cpp
   RegisterContextFreeBSDKernel_arm64.cpp
   RegisterContextFreeBSDKernel_i386.cpp
+  RegisterContextFreeBSDKernel_riscv64.cpp
   RegisterContextFreeBSDKernel_x86_64.cpp
   ThreadFreeBSDKernel.cpp
 

lldb/source/Plugins/Process/FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.cpp

@@ -0,0 +1,110 @@
+//===----------------------------------------------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+///
+/// \file
+/// This file contains the definition of the
+/// RegisterContextFreeBSDKernel_riscv64 class, which is used for reading
+/// registers from PCB on riscv64 kernel dump.
+///
+//===----------------------------------------------------------------------===//
+
+#include "RegisterContextFreeBSDKernel_riscv64.h"
+
+#include "lldb/Target/Process.h"
+#include "lldb/Target/Thread.h"
+#include "lldb/Utility/RegisterValue.h"
+#include "llvm/Support/Endian.h"
+
+using namespace lldb;
+using namespace lldb_private;
+
+RegisterContextFreeBSDKernel_riscv64::RegisterContextFreeBSDKernel_riscv64(
+    Thread &thread, std::unique_ptr<RegisterInfoPOSIX_riscv64> register_info_up,
+    lldb::addr_t pcb_addr)
+    : RegisterContextPOSIX_riscv64(thread, std::move(register_info_up)),
+      m_pcb_addr(pcb_addr) {}
+
+bool RegisterContextFreeBSDKernel_riscv64::ReadGPR() { return true; }
+
+bool RegisterContextFreeBSDKernel_riscv64::ReadFPR() { return true; }
+
+bool RegisterContextFreeBSDKernel_riscv64::WriteGPR() {
+  assert(0);
+  return false;
+}
+
+bool RegisterContextFreeBSDKernel_riscv64::WriteFPR() {
+  assert(0);
+  return false;
+}
+
+bool RegisterContextFreeBSDKernel_riscv64::ReadRegister(
+    const RegisterInfo *reg_info, RegisterValue &value) {
+  if (m_pcb_addr == LLDB_INVALID_ADDRESS)
+    return false;
+
+  // https://cgit.freebsd.org/src/tree/sys/riscv/include/pcb.h
+  struct {
+    llvm::support::ulittle64_t ra;
+    llvm::support::ulittle64_t sp;
+    llvm::support::ulittle64_t gp;
+    llvm::support::ulittle64_t tp;
+    llvm::support::ulittle64_t s[12];
+  } pcb;
+
+  Status error;
+  size_t rd =
+      m_thread.GetProcess()->ReadMemory(m_pcb_addr, &pcb, sizeof(pcb), error);
+  if (rd != sizeof(pcb))
+    return false;
+
+  uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB];
+  switch (reg) {
+  case gpr_pc_riscv:
+  // Supply the RA as PC as well to simulate the PC as if the thread had just
+  // returned.
+  case gpr_ra_riscv:
+    value = pcb.ra;
+    break;
+  case gpr_sp_riscv:
+    value = pcb.sp;
+    break;
+  case gpr_gp_riscv:
+    value = pcb.gp;
+    break;
+  case gpr_tp_riscv:
+    value = pcb.tp;
+    break;
+  case gpr_fp_riscv:
+    value = pcb.s[0];
+    break;
+  case gpr_s1_riscv:
+    value = pcb.s[1];
+    break;
+  case gpr_s2_riscv:
+  case gpr_s3_riscv:
+  case gpr_s4_riscv:
+  case gpr_s5_riscv:
+  case gpr_s6_riscv:
+  case gpr_s7_riscv:
+  case gpr_s8_riscv:
+  case gpr_s9_riscv:
+  case gpr_s10_riscv:
+  case gpr_s11_riscv:
+    value = pcb.s[reg - gpr_s2_riscv];
+    break;
+  default:
+    return false;
+  }
+  return true;
+}
+
+bool RegisterContextFreeBSDKernel_riscv64::WriteRegister(
+    const RegisterInfo *reg_info, const RegisterValue &value) {
+  return false;
+}

lldb/source/Plugins/Process/FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.h

@@ -0,0 +1,49 @@
+//===----------------------------------------------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+///
+/// \file
+/// This file contains the declaration of the
+/// RegisterContextFreeBSDKernel_riscv64 class, which is used for reading
+/// registers from PCB on riscv64 kernel dump.
+///
+//===----------------------------------------------------------------------===//
+
+#ifndef LLDB_SOURCE_PLUGINS_PROCESS_FREEBSDKERNEL_REGISTERCONTEXTFREEBSDKERNEL_RISCV64_H
+#define LLDB_SOURCE_PLUGINS_PROCESS_FREEBSDKERNEL_REGISTERCONTEXTFREEBSDKERNEL_RISCV64_H
+
+#include "Plugins/Process/Utility/RegisterContextPOSIX_riscv64.h"
+#include "Plugins/Process/elf-core/RegisterUtilities.h"
+
+class RegisterContextFreeBSDKernel_riscv64
+    : public RegisterContextPOSIX_riscv64 {
+public:
+  RegisterContextFreeBSDKernel_riscv64(
+      lldb_private::Thread &thread,
+      std::unique_ptr<RegisterInfoPOSIX_riscv64> register_info_up,
+      lldb::addr_t pcb_addr);
+
+  bool ReadRegister(const lldb_private::RegisterInfo *reg_info,
+                    lldb_private::RegisterValue &value) override;
+
+  bool WriteRegister(const lldb_private::RegisterInfo *reg_info,
+                     const lldb_private::RegisterValue &value) override;
+
+protected:
+  bool ReadGPR() override;
+
+  bool ReadFPR() override;
+
+  bool WriteGPR() override;
+
+  bool WriteFPR() override;
+
+private:
+  lldb::addr_t m_pcb_addr;
+};
+
+#endif // LLDB_SOURCE_PLUGINS_PROCESS_FREEBSDKERNEL_REGISTERCONTEXTFREEBSDKERNEL_RISCV64_H

lldb/source/Plugins/Process/FreeBSDKernel/ThreadFreeBSDKernel.cpp

@@ -15,9 +15,11 @@
 #include "Plugins/Process/Utility/RegisterContextFreeBSD_i386.h"
 #include "Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.h"
 #include "Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h"
+#include "Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.h"
 #include "ProcessFreeBSDKernel.h"
 #include "RegisterContextFreeBSDKernel_arm64.h"
 #include "RegisterContextFreeBSDKernel_i386.h"
+#include "RegisterContextFreeBSDKernel_riscv64.h"
 #include "RegisterContextFreeBSDKernel_x86_64.h"
 
 using namespace lldb;
@@ -62,6 +64,12 @@ ThreadFreeBSDKernel::CreateRegisterContextForFrame(StackFrame *frame) {
               *this, std::make_unique<RegisterInfoPOSIX_arm64>(arch, 0),
               m_pcb_addr);
       break;
+    case llvm::Triple::riscv64:
+      m_thread_reg_ctx_sp =
+          std::make_shared<RegisterContextFreeBSDKernel_riscv64>(
+              *this, std::make_unique<RegisterInfoPOSIX_riscv64>(arch, 0),
+              m_pcb_addr);
+      break;
     case llvm::Triple::x86:
       m_thread_reg_ctx_sp = std::make_shared<RegisterContextFreeBSDKernel_i386>(
           *this, new RegisterContextFreeBSD_i386(arch), m_pcb_addr);

llvm/docs/ReleaseNotes.md

@@ -182,6 +182,7 @@ Changes to LLDB
 * Support for FreeBSD on MIPS64 has been removed.
 * The minimum assumed version of FreeBSD is now 14. The effect of which is that watchpoints are
   assumed to be supported.
+* Kernel debugging support for RISCV64 on FreeBSD has been added.
 
 Changes to BOLT
 ---------------