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[X86] Optimized ADC + ADD to ADC #176713

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Merged
JaydeepChauhan14 merged 5 commits into from
Feb 9, 2026
Merged

[X86] Optimized ADC + ADD to ADC #176713

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241a000
[X86] Optimized ADC + ADD to ADC
JaydeepChauhan14 Jan 19, 2026
10405d0
Merge branch 'main' into optimizeadcaddwithadc
JaydeepChauhan14 Jan 23, 2026
f4a638b
Removed testcases
JaydeepChauhan14 Jan 23, 2026
09f09d4
Merge branch 'main' into optimizeadcaddwithadc
JaydeepChauhan14 Feb 6, 2026
84b0356
Updated testcase
JaydeepChauhan14 Feb 6, 2026
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8 changes: 6 additions & 2 deletions llvm/lib/Target/X86/X86ISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -58472,7 +58472,11 @@ static SDValue combineFunnelShift(SDNode *N, SelectionDAG &DAG,
static bool needCarryOrOverflowFlag(SDValue Flags) {
assert(Flags.getValueType() == MVT::i32 && "Unexpected VT!");

for (const SDNode *User : Flags->users()) {
for (const SDUse &Use : Flags->uses()) {
// Only check things that use the flags.
if (Use.getResNo() != Flags.getResNo())
continue;
const SDNode *User = Use.getUser();
X86::CondCode CC;
switch (User->getOpcode()) {
default:
Expand Down Expand Up @@ -58816,7 +58820,7 @@ static SDValue combineADC(SDNode *N, SelectionDAG &DAG,
// Fold ADC(ADD(X,Y),0,Carry) -> ADC(X,Y,Carry)
// iff the flag result is dead.
if (LHS.getOpcode() == ISD::ADD && RHSC && RHSC->isZero() &&
!N->hasAnyUseOfValue(1))
!needCarryOrOverflowFlag(SDValue(N, 1)))
return DAG.getNode(X86ISD::ADC, SDLoc(N), N->getVTList(), LHS.getOperand(0),
LHS.getOperand(1), CarryIn);

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8 changes: 3 additions & 5 deletions llvm/test/CodeGen/X86/combine-adc.ll
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Expand Up @@ -140,12 +140,11 @@ define i32 @adc_merge_sub(i32 %a0) nounwind {
define i32 @adc_add(i32 %0, i32 %1, i32 %2, i32 %3) nounwind {
; X86-LABEL: adc_add:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: addl {{[0-9]+}}(%esp), %edx
; X86-NEXT: cmpl %ecx, %eax
; X86-NEXT: adcl $0, %edx
; X86-NEXT: adcl {{[0-9]+}}(%esp), %edx
; X86-NEXT: js .LBB4_2
; X86-NEXT: # %bb.1:
; X86-NEXT: movl %ecx, %eax
Expand All @@ -155,9 +154,8 @@ define i32 @adc_add(i32 %0, i32 %1, i32 %2, i32 %3) nounwind {
; X64-LABEL: adc_add:
; X64: # %bb.0:
; X64-NEXT: movl %esi, %eax
; X64-NEXT: addl %ecx, %edx
; X64-NEXT: cmpl %esi, %edi
; X64-NEXT: adcl $0, %edx
; X64-NEXT: adcl %ecx, %edx
; X64-NEXT: cmovsl %edi, %eax
; X64-NEXT: retq
%5 = icmp ult i32 %0, %1
Expand Down